# US 10,504,653 B1 · Multilayer ceramic electronic component

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- Number: US 10,504,653 B1
- Document ID: US10504653B1
- Status: Granted
- Kind: B1
- Application number: 16/169,391
- Filed: 2018-10-24
- Granted: 2019-12-10
- Earliest claimed: 2018-09-05
- Assignees: Samsung Electro-Mechanics Co., Ltd.
- Applicants: Samsung Electro-Mechanics Co., Ltd.
- Inventors: Gwang Hyeon Park; Jang Yeol Lee; Yong Park; Hye Young Choi; Jong Ho Lee; Ji Hong Jo
- Web page: https://patentgrep.com/patent/US10504653B1

## CPC

- H01G 4/232: electrically connecting two or more layers of a stacked or rolled capacitor
- H01G 4/30: Stacked capacitors (H01G4/33 takes precedence)
- H01G 4/008: Selection of materials
- H01G 4/012: Form of non-self-supporting electrodes
- H01G 4/1227: {based on alkaline earth titanates}
- H01G 4/2325: {characterised by the material of the terminals}
- H01G 4/248: the terminals embracing or surrounding the capacitive element, e.g. caps (H01G4/252 takes precedence)
- H01G: CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE (selection of specified materials as dielectric H01B3/00; capacitors having potential barriers H10D1/62, H10K10/10)

## Abstract

A multilayer ceramic electronic component includes a ceramic body including first and second internal electrodes alternately stacked with dielectric layers interposed therebetween, and first and second external electrodes disposed on outer surfaces of the ceramic body. The first and second external electrodes include, respectively, first and second base electrode layers and first and second plating layers. The first and second plating or base electrodes layers have at least one hole positioned in at least one corner of the ceramic body, and the hole includes a point of a respective edge of the ceramic body at which the respective edge meets a virtual line extending in a thickness direction and drawn through an end in a width direction of an exposed edge of one of the first and second internal electrodes exposed in a surface in which first or second internal electrodes contact first or second external electrodes.

## Claims

### Claim 1

A multilayer ceramic electronic component comprising:
a ceramic body including dielectric layers and pluralities of first and second internal electrodes alternately stacked in a thickness direction and respectively exposed to first and second end surfaces opposing each other in a length direction of the ceramic body with each of the dielectric layers interposed therebetween; and
first and second external electrodes disposed on outer surfaces of the ceramic body to be connected to the first and second internal electrodes, respectively, and disposed to cover at least a portion of eight corners of the ceramic body,
wherein the first and second external electrodes include, respectively, first and second base electrode layers at least partially in contact with the outer surfaces of the ceramic body and first and second plating layers disposed to cover the first and second base electrode layers, respectively,
at least one of the first and second plating layers has at least one hole therein positioned in at least one of the eight corners of the ceramic body,
each hole of the at least one hole does not extend to a point of a respective edge of the ceramic body at which the respective edge meets a virtual line extending in the thickness direction and drawn through an end in a width direction of an exposed edge of one of the first or second internal electrodes exposed in the first or second end surfaces,
each of the first and second internal electrodes extends in a plane extending in width and length directions, and a thickness of each of the first and second external electrodes in a respective center of a respective [width×thickness] surface is 10 μm or less,
the first and second external electrodes further include, respectively, first and second conductive resin layers disposed between the first and second base electrode layers and the first and second plating layers, respectively,
at least one of the first and second conductive resin layers is exposed through the at least one hole in the at least one of the first and second plating layers,
the first and second external electrodes further include, respectively, first and second tin plating layers disposed on outer surfaces of the first and second plating layers, respectively,
each of the first and second plating layers contains nickel, and
at least one of the first and second tin plating layers covers the at least one hole in the at least one of the first and second plating layers.

### Claim 2 (depends on 1)

The multilayer ceramic electronic component of claim 1, wherein a thickness of each of the first and second plating layers at the respective center of the respective [width×thickness] surface is 3 μm or more to 5 μm or less.

### Claim 3

A multilayer ceramic electronic component comprising:
a ceramic body including dielectric layers and pluralities of first and second internal electrodes alternately stacked in a thickness direction and respectively exposed to first and second end surfaces opposing each other in a length direction of the ceramic body with each of the dielectric layers interposed therebetween; and
first and second external electrodes disposed on outer surfaces of the ceramic body to be connected to the first and second internal electrodes, respectively, and disposed to cover at least a portion of eight corners of the ceramic body,
wherein the first and second external electrodes include, respectively, first and second base electrode layers at least partially in contact with the outer surfaces of the ceramic body and first and second plating layers disposed to cover the first and second, base electrode layers, respectively,
at least one of the first and second plating layers has at least one hole therein positioned in at least one of the eight corners of the ceramic body,
each hole of the at least one hole does not extend to a point of a respective edge of the ceramic body at which the respective edge meets a virtual line extending in the thickness direction and drawn through an end in a width direction of an exposed edge of one of the first or second internal electrodes exposed in the first or second end surfaces,
each of the first and second internal electrodes extends in a plane extending in width and length directions, and a thickness of each of the first and second external electrodes in a respective center of a respective [width×thickness] surface is 10 μm or less,
at least one of the first and second base electrode layers has at least one hole positioned at one or more points of the at least one of the first and second base electrode layers overlapping with the at least one hole in the at least one of the first and second plating layers,
the first and second external electrodes further include, respectively, first and second conductive resin layers disposed between the first and second base electrode layers and the first and second plating layers, respectively, and
at least one of the first and second conductive resin layers has at least one hole positioned at one or more points of the at least one of the first and second conductive resin layers overlapping with the at least one hole in the at least one of the first and second plating layers.

### Claim 4 (depends on 3)

The multilayer ceramic electronic component of claim 3, wherein a thickness of each of the first and second plating layers at the respective center of the respective [width×thickness] surface is 3 μm or more to 5 μm or less.

### Claim 5 (depends on 4)

The multilayer ceramic electronic component of claim 4, wherein an average thickness of each dielectric layer disposed between a respective pair of adjacent first and second internal electrodes is 0.4 μm or less, and
an average thickness of each of the first and second internal electrodes is 0.4 μm or less.

### Claim 6 (depends on 5)

The multilayer ceramic electronic component of claim 5, further comprising first and second solders connected to the first and second external electrodes, respectively, on a board.