# US 10,504,562 B2 · Power management integrated circuit load switch driver with dynamic biasing > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,504,562 B2 - Document ID: US10504562B2 - Status: Granted - Kind: B2 - Application number: 15/919,020 - Filed: 2018-03-12 - Published: 2019-09-12 - Granted: 2019-12-10 - Earliest claimed: 2018-03-12 - Assignees: Micron Technology, Inc. - Applicants: Micron Technology, Inc. - Inventors: Matthew David Rowley - Web page: https://patentgrep.com/patent/US10504562B2 ## CPC - G11C 5/147: {Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops (G11C5/141 takes precedence)} - G06F 1/28: Supervision thereof, e.g. detecting power-supply failure by out of limits supervision - G06F 1/305: {in the event of power-supply fluctuations} - G06F 1/3275: {Power saving in memory, e.g. RAM, cache} - G11C 5/145: {Applications of charge pumps; Boosted voltage circuits; Clamp circuits therefor (G11C5/141 takes precedence)} - G11C 11/4074: Power supply or voltage generation circuits, e.g. bias voltage generators, substrate voltage generators, back-up power, power control circuits - H03K 17/687: the devices being field-effect transistors - H03K 2217/0036: Means reducing energy consumption - Y02D 10/00: Energy efficient computing, e.g. low power processors, power management or thermal management - G11C: STATIC STORES (semiconductor memory devices H10B) - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) - H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M) - Y02D: CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE ## Abstract Disclosed is an improved load switch driver for power management integrated circuit (PMIC) devices. In one embodiment, a PMIC is disclosed comprising a gate driver, the gate driver connected to the gate of a switch; an operation frequency generator connected to the gate driver and configured to supply a periodic voltage to the gate driver; and a voltage sensor, the voltage sensor connected to the operation frequency generator and the source of the switch, the voltage sensor configured to monitor a drain-source voltage of the switch and lower the frequency of the operation frequency generator to a second frequency in response to detecting a collapse of the drain-source voltage. ## Claims ### Claim 1 A power management integrated circuit (PMIC) comprising: a gate driver, the gate driver coupled to a gate of a switch; an operation frequency generator coupled to the gate driver and configured to supply a periodic voltage to the gate driver; and a voltage sensor, the voltage sensor coupled to the operation frequency generator and a source of the switch, the voltage sensor configured to monitor a drain-source voltage of the switch and lower a frequency of the operation frequency generator to a second frequency in response to detecting a collapse of the drain-source voltage. ### Claim 2 (depends on 1) The PMIC of claim 1, the gate driver comprising a charge pump. ### Claim 3 (depends on 1) The PMIC of claim 1, the gate driver comprising a push-pull driver. ### Claim 4 (depends on 1) The PMIC of claim 1, the switch comprising a MOSFET switch. ### Claim 5 (depends on 1) The PMIC of claim 1, the periodic voltage supplied at a frequency between 200 and 400 kHz. ### Claim 6 (depends on 1) The PMIC of claim 1, the second frequency comprising a frequency between 8.5 and 12 kHz. ### Claim 7 (depends on 1) The PMIC of claim 1, further comprising at least one voltage regulator and at least one sequencer. ### Claim 8 A system comprising: an interface; a power management integrated circuit (PMIC), the PMIC powered by voltages supplied over the interface and including a load switch driver; and one or more memory devices coupled to the load switch driver of the PMIC via at least one switch, the load switch driver configured to monitor a drain-source voltage of the switch and lower a frequency of an operation frequency generator to a second frequency in response to detecting a collapse of the drain-source voltage. ### Claim 9 (depends on 8) The system of claim 8, the interface comprising a SATA or PCI-E interface. ### Claim 10 (depends on 8) The system of claim 8, the PMIC comprising a second and third load switch driver. ### Claim 11 (depends on 10) The system of claim 10, the second load switch driver coupled, via a second switch to a DRAM device. ### Claim 12 (depends on 11) The system of claim 11, the third load switch driver coupled, via a third switch to an ASIC device. ### Claim 13 (depends on 8) The system of claim 8, the load switch driver comprising: a gate driver, the gate driver connected to the gate of the switch; an operation frequency generator connected to the gate driver and configured to supply a periodic voltage to the gate driver; and a voltage sensor, the voltage sensor connected to the operation frequency generator and a source of the switch, the voltage sensor configured to monitor a drain-source voltage of the switch. ### Claim 14 (depends on 13) The system of claim 13, the gate driver comprising a charge pump. ### Claim 15 (depends on 13) The system of claim 13, the gate driver comprising a push-pull driver. ### Claim 16 (depends on 13) The system of claim 13, the switch comprising a MOSFET switch. ### Claim 17 (depends on 13) The system of claim 13, the periodic voltage supplied at a frequency between 200 and 400 kHz. ### Claim 18 (depends on 13) The system of claim 13, the second frequency comprising a frequency between 8.5 and 12 kHz. ### Claim 19 A method comprising: supplying a gate voltage to a gate of a switch at a first frequency; monitoring a drain-source voltage of the switch; determining that the drain-source voltage of the switch has collapsed; and supplying the gate voltage to the gate of the switch at a second frequency in response to determining that the drain-source voltage has collapsed. ### Claim 20 (depends on 1) The method of claim 1, wherein the periodic voltage is supplied at the frequency between 200 and 400 kHz and the second frequency comprising a frequency between 8.5 and 12 kHz.