# US 10,504,444 B2 · Pixel circuit

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- Number: US 10,504,444 B2
- Document ID: US10504444B2
- Status: Granted
- Kind: B2
- Application number: 16/028,430
- Filed: 2018-07-06
- Published: 2019-09-12
- Granted: 2019-12-10
- Earliest claimed: 2018-03-09
- Assignees: Au Optronics Corporation
- Applicants: Au Optronics Corporation
- Inventors: Mao-Hsun Cheng
- Web page: https://patentgrep.com/patent/US10504444B2

## CPC

- G09G 3/325: the data current flowing through the driving transistor during a setting phase, e.g. by using a switch for connecting the driving transistor to the data driver
- G09G 3/3258: with pixel circuitry controlling the voltage across the light-emitting element
- G09G 3/32: semiconductive, e.g. using light-emitting diodes [LED]
- G09G 2300/0819: used for counteracting undesired variations, e.g. feedback or autozeroing
- G09G 2300/0852: being a dynamic memory with more than one capacitor
- G09G 2300/0861: with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
- G09G 2320/043: Preventing or counteracting the effects of ageing
- G09G 2320/045: Compensation of drifts in the characteristics of light emitting or modulating elements
- G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00)

## Abstract

A pixel circuit is provided. The pixel circuit includes a light emitting element, first to third transistors, first to second capacitors and a voltage setting circuit. The light emitting element receives a system low voltage. The first transistor receives a system high voltage and controlled by an emission signal. The second transistor is coupled between the first transistor and the light emitting device. The first capacitor is coupled to the second transistor. The second capacitor is coupled between the first capacitor and the first transistor. The voltage setting circuit receives first to second scan signals, a source driving signal and a data voltage to remove charges stored in the first capacitor according to the first to second scan signal, and writes the data voltage to the first capacitor according to the source driving signal. The third transistor is controlled by the second scan signal and receives a first reference voltage.

## Claims

### Claim 1

A pixel circuit, comprising:
a light emitting element, having an anode and a cathode receiving a system low voltage;
a first transistor, having a first terminal receiving a system high voltage, a control terminal receiving an emission signal and a second terminal;
a second transistor, having a first terminal coupled to the second terminal of the first transistor, a control terminal and a second terminal coupled to the anode of the light emitting element;
a first capacitor, having a first end and a second end coupled to the control terminal of the second transistor;
a second capacitor, having a first end coupled to the first end of the first capacitor and a second end coupled to the second terminal of the first transistor;
a voltage setting circuit, coupled to the first end and the second end of the first capacitor, and receiving a first scan signal, a second scan signal, a source driving signal and a data voltage and writing the data voltage to the first capacitor according to the source driving signal; and
a third transistor, having a first terminal coupled to the second terminal of the second transistor, a control terminal coupled to the first scan signal and a second terminal receiving a first reference voltage, wherein the first reference voltage is smaller than a sum of the system low voltage and a lighting threshold voltage of the light emitting element.

### Claim 2 (depends on 1)

The pixel circuit as claimed in claim 1, wherein the voltage setting circuit comprises:
a fourth transistor, having a first terminal receiving a second reference voltage, a control terminal receiving the second scan signal, and a second terminal coupled to the first terminal of the first capacitor;
a fifth transistor, having a first terminal receiving the second reference voltage, a control terminal receiving the first scan signal, and a second terminal coupled to the second terminal of the first capacitor; and
a sixth transistor, having a first terminal receiving the data voltage, a control terminal receiving the source driving signal, and a second terminal coupled to the first terminal of the first capacitor.

### Claim 3 (depends on 2)

The pixel circuit as claimed in claim 2, wherein the second reference voltage is greater than the first reference voltage.

### Claim 4 (depends on 1)

The pixel circuit as claimed in claim 1, wherein the voltage setting circuit comprises:
a seventh transistor, having a first terminal receiving a second reference voltage, a control terminal receiving the first scan signal, and a second terminal coupled to the first terminal of the first capacitor;
an eighth transistor, having a first terminal receiving the second reference voltage, a control terminal receiving the second scan signal, and a second terminal coupled to the second terminal of the first capacitor;
a ninth transistor, having a first terminal coupled to the second terminal of the first capacitor, a control terminal receiving the source driving signal, and a second terminal receiving the data voltage.

### Claim 5 (depends on 1)

The pixel circuit as claimed in claim 1, further comprising:
a tenth transistor, having a first terminal coupled to the second terminal of the second transistor, a control terminal receiving the emission signal, and a second terminal coupled to the anode of the light emitting element.

### Claim 6 (depends on 1)

The pixel circuit as claimed in claim 1, wherein the pixel circuit is configured in a pixel row, and the second scan signal is a previous first scan signal provided to a previous pixel row.

### Claim 7 (depends on 1)

The pixel circuit as claimed in claim 1, wherein a frame period used for driving the pixel circuit comprises a voltage reset period, a voltage compensation period, a data writing period and an emission period.

### Claim 8 (depends on 7)

The pixel circuit as claimed in claim 7, wherein the voltage compensation period is later than the voltage reset period, the data writing period is later than the voltage compensation period, and the emission period is later than the data writing period.

### Claim 9 (depends on 7)

The pixel circuit as claimed in claim 7, wherein the first scan signal is enabled in the voltage reset period, the voltage compensation period and the data writing period, the second scan signal is enabled in the voltage reset period and the voltage compensation period, the source driving signal is enabled in the voltage compensation period, and the emission signal is enabled in the voltage reset period and the emission period.

### Claim 10 (depends on 7)

The pixel circuit as claimed in claim 7, wherein a time length of the voltage compensation period corresponds to a resolution of a display panel.

### Claim 11 (depends on 1)

The pixel circuit as claimed in claim 1, wherein the light emitting element comprises one of an organic light emitting diode and a micro light emitting diode.

### Claim 12

A pixel circuit, comprising:
a light emitting element, having an anode and a cathode receiving a system low voltage;
a first transistor, having a first terminal receiving a system high voltage, a control terminal receiving an emission signal and a second terminal;
a second transistor, having a first terminal coupled to the second terminal of the first transistor, a control terminal and a second terminal coupled to the anode of the light emitting element;
a first capacitor, having a first end and a second end coupled to the control terminal of the second transistor;
a second capacitor, having a first end coupled to the first end of the first capacitor and a second end coupled to the second terminal of the first transistor;
a voltage setting circuit, coupled to the first end and the second end of the first capacitor, and receiving a first scan signal, a second scan signal, a source driving signal and a data voltage and writing the data voltage to the first capacitor according to the source driving signal; and
a third transistor, having a first terminal coupled to the second terminal of the second transistor, a control terminal coupled to the first scan signal and a second terminal receiving a first reference voltage, wherein the first reference voltage is delivered to the second terminal of the second transistor by the third transistor that is in a turn-on state.
