# US 10,504,396 B2 · Display device and electronic apparatus > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,504,396 B2 - Document ID: US10504396B2 - Status: Granted - Kind: B2 - Application number: 16/030,195 - Filed: 2018-07-09 - Published: 2019-01-10 - Granted: 2019-12-10 - Earliest claimed: 2012-07-31 - Assignees: Sony Corporation - Applicants: Sony Corporation - Inventors: Seiichiro Jinta; Akira Yumoto; Takahiro Seki - Web page: https://patentgrep.com/patent/US10504396B2 ## CPC - G09G 3/20: for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix {no fixed position being assigned to or needed to be assigned to the individual characters or partial characters} - G09G 3/3233: with pixel circuitry controlling the current through the light-emitting element - G09G 3/3266: Details of drivers for scan electrodes - G09G 2300/0426: Layout of electrodes and connections - G09G 2300/0819: used for counteracting undesired variations, e.g. feedback or autozeroing - G09G 2300/0861: with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes - G09G 2300/0866: by means of changes in the pixel supply voltage - G09G 2320/0233: Improving the luminance or brightness uniformity across the screen - G09G 2330/02: Details of power systems and of start or stop of display operation - G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00) ## Abstract A display device includes: a display unit that includes a plurality of pixels and a plurality of scanning signal lines delivering scanning pulses to the plurality of pixels; and a scanning unit that includes a first switch provided in association with each of the plurality of scanning signal lines and selectively extracting the scanning pulse from one of a plurality of scanning pulse signals including the plurality of scanning pulses. ## Claims ### Claim 1 A display device comprising: a pulse signal line electrically connected to a source of a first transistor and a source of a second transistor; a first switch between the pulse signal line and the source of the first transistor; a first selection signal line electrically connected directly to a gate of the first transistor; a second selection signal line electrically connected directly to a gate of the second transistor; a third selection signal line electrically connected directly to a gate of the first switch and a gate of a second switch; a first scanning signal line electrically connected directly to a drain of the first transistor; and a second scanning signal line electrically connected directly to a drain of the second transistor, wherein the second scanning signal line is between the first scanning signal line and a third scanning signal line, the third scanning signal line is between the second scanning signal line and a fourth scanning signal line, wherein the second switch is between the pulse signal line and the source of the second transistor. ### Claim 2 (depends on 1) The display device according to claim 1, wherein the third scanning signal line and the fourth scanning signal line extend along a direction. ### Claim 3 (depends on 2) The display device according to claim 2, wherein the first scanning signal line and the second scanning signal line extend along a direction. ### Claim 4 (depends on 1) The display device according to claim 1, wherein the first switch is controllable to electrically disconnect the pulse signal line from the source of the first transistor. ### Claim 5 (depends on 4) The display device according to claim 4, wherein the first switch is controllable to electrically connect the pulse signal line directly to the source of the first transistor. ### Claim 6 (depends on 1) The display device according to claim 1, further comprising: a gate electrode of a write transistor electrically connected to the first scanning signal line. ### Claim 7 (depends on 6) The display device according to claim 6, wherein the write transistor is controllable by a signal on the first scanning signal line to electrically disconnect a driving transistor from a data line and electrically connect the data line to the driving transistor. ### Claim 8 (depends on 7) The display device according to claim 7, wherein the driving transistor is controllable to electrically disconnect a first power line from a light emitting element. ### Claim 9 (depends on 8) The display device according to claim 8, wherein the driving transistor is controllable to electrically connect the first power line to the light emitting element. ### Claim 10 (depends on 8) The display device according to claim 8, further comprising: a first power signal line electrically connected to the first power line and a third power line. ### Claim 11 (depends on 10) The display device according to claim 10, further comprising: a second power line between the first power line and the third power line. ### Claim 12 (depends on 11) The display device according to claim 11, further comprising: a power signal generation unit configured to output a power signal onto the first power line while simultaneously outputting a second power signal onto the second power line. ### Claim 13 (depends on 11) The display device according to claim 11, further comprising: a second power signal line that is electrically connected to the second power line and a fourth power line. ### Claim 14 (depends on 13) The display device according to claim 13, wherein the third power line is between the second power line and the fourth power line. ### Claim 15 (depends on 1) The display device according to claim 1, further comprising: a signal generation unit configured to output a first selection signal onto the first selection signal line while simultaneously outputting a second selection signal onto the second selection signal line. ### Claim 16 (depends on 1) An electronic apparatus comprising: The display device according to claim 1. ### Claim 17 A display device comprising: a pulse signal line electrically connected to a source of a first transistor and a source of a second transistor; a first switch between the pulse signal line and the source of the first transistor; a first selection signal line electrically connected directly to a gate of the first transistor; a second selection signal line electrically connected directly to a gate of the second transistor; a third selection signal line electrically connected directly to a gate of the first switch and a gate of a second switch; a first scanning signal line electrically connected directly to a drain of the first transistor; and a second scanning signal line electrically connected directly to a drain of the second transistor, wherein the second scanning signal line is between the first scanning signal line and a third scanning signal line, the third scanning signal line is between the second scanning signal line and a fourth scanning signal line, wherein the second switch is controllable to electrically disconnect the pulse signal line from the source of the second transistor. ### Claim 18 A display device comprising: a pulse signal line electrically connected to a source of a first transistor and a source of a second transistor; a first switch between the pulse signal line and the source of the first transistor; a first selection signal line electrically connected directly to a gate of the first transistor; a second selection signal line electrically connected directly to a gate of the second transistor; a third selection signal line electrically connected directly to a gate of the first switch and a gate of a second switch; a first scanning signal line electrically connected directly to a drain of the first transistor; and a second scanning signal line electrically connected directly to a drain of the second transistor, wherein the second scanning signal line is between the first scanning signal line and a third scanning signal line, the third scanning signal line is between the second scanning signal line and a fourth scanning signal line, wherein the second switch is controllable to electrically connect the pulse signal line directly to the source of the second transistor.