# US 10,504,310 B2 · Techniques for access control using wearable devices > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,504,310 B2 - Document ID: US10504310B2 - Status: Granted - Kind: B2 - Application number: 15/640,964 - Filed: 2017-07-03 - Published: 2017-12-28 - Granted: 2019-12-10 - Earliest claimed: 2014-12-24 - Assignees: Intel Corporation - Applicants: Intel Corporation - Inventors: Glen J. Anderson; Justin M. Reina - Web page: https://patentgrep.com/patent/US10504310B2 ## CPC - G07C 9/22: in combination with an identity check of the pass holder - G06K 19/07381: {with deactivation or otherwise incapacitation of at least a part of the circuit upon detected tampering} - G07C 9/27: with central registration - G07C 9/29: the pass containing active electronic elements, e.g. smartcards - A45F 2005/002: {combined with other objects} - A45F 2005/008: {Hand articles fastened to the wrist or to the arm or to the leg} - G08B 21/0286: {Tampering or removal detection of the child unit from child or article} - G07C: TIME OR ATTENDANCE REGISTERS; REGISTERING OR INDICATING THE WORKING OF MACHINES; GENERATING RANDOM NUMBERS; VOTING OR LOTTERY APPARATUS; ARRANGEMENTS, SYSTEMS OR APPARATUS FOR CHECKING NOT PROVIDED FOR ELSEWHERE - G06K: GRAPHICAL DATA READING (image or video recognition or understanding G06V); PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS - A45F: TRAVELLING OR CAMP EQUIPMENT: SACKS OR PACKS CARRIED ON THE BODY - G08B: SIGNALLING SYSTEMS, e.g. PERSONAL CALLING SYSTEMS; ORDER TELEGRAPHS; ALARM SYSTEMS ## Abstract Various embodiments are generally directed to techniques for using little or no electric power to monitor whether a wearable device continues to be worn by a person such that it may continue to be used to access a secured item. An apparatus may include a processor component; a storage to store an access credential; a presentation component to wirelessly transmit the access credential to an access device to enable a grant of access to a secured item; a power source; and a clasp coupled to a wearable portion to prevent removal of the wearable portion unless the clasp is operated to change state from a clasped state to an unclasped state, the clasp to cause loss of electric power from the power source to the processor component and the storage when in the unclasped state to nullify the access credential. Other embodiments are described and claimed. ## Claims ### Claim 1 A wearable apparatus comprising: a clasp operable between a clasped state and an unclasped state, the clasped state to place a switch in a first position and the unclasped state to place the switch in a second position; a transistor comprising first, second, and third terminals, the first terminal connected in parallel with the switch and a positive terminal of a power source, the second terminal connected to a power input of a processor component, and the third terminal connected in parallel with the switch and a tamper signal input to the processor component; a memory communicatively coupled with the processor component, the memory comprising data; and logic, at least a portion of the logic implemented by the processor component, the logic to: identify a voltage change at the tamper signal input in response to operation of the clasp from the clasped state to the unclasped state; and alter one or more portions of the data in response to the voltage change. ### Claim 2 (depends on 1) The wearable apparatus of claim 1, operation of the clasp from the clasped state to the unclasped state to cause a voltage drop at the power input to the processor component. ### Claim 3 (depends on 2) The wearable apparatus of claim 2, operation of the clasp from the clasped state to the unclasped state to cause a voltage change at the third terminal, the voltage change at the third terminal to cause the voltage drop at the power input to the processor component. ### Claim 4 (depends on 1) The wearable apparatus of claim 1, the third terminal connected in parallel with a resistor connected to a negative terminal of the power source. ### Claim 5 (depends on 1) The wearable apparatus of claim 1, the logic to erase or overwrite the one or more portions of the data to alter the one or more portions of the data in response to the voltage change. ### Claim 6 (depends on 5) The wearable apparatus of claim 5, the one or more portions of the data comprising access credentials. ### Claim 7 (depends on 1) The wearable apparatus of claim 1, comprising: an antenna; and an interface to couple the processor component to the antenna to provide the processor component with electric power conveyed to the antenna via an electromagnetic field. ### Claim 8 (depends on 1) The wearable apparatus of claim 1, comprising: an antenna; and an interface to couple the processor component to the antenna, the logic to retrieve an identifier from the memory and cooperate with the interface to transmit the identifier via near field communications (NFC) to an initialization device. ### Claim 9 (depends on 8) The wearable apparatus of claim 8, the logic to receive the data via NFC in response to transmission of the identifier to the initialization device and store the data in the memory. ### Claim 10 (depends on 9) The wearable apparatus of claim 9, the logic to condition transmission of the data on whether the clasp has changed state from the clasped state to the unclasped state following receipt of the data via NFC and storage of the data within the memory. ### Claim 11 (depends on 8) The wearable apparatus of claim 8, the logic to cooperate with the interface to transmit an indication of the state of the clasp to the initialization device via NFC. ### Claim 12 A method comprising: measuring a voltage level of a positive terminal of a power source at a tamper input signal of a processor component when a switch is in a first position, the switch connected to a first terminal of a transistor in parallel with the positive terminal of the power source, a second terminal of the transistor connected to a power input of the processor component, and a third terminal of the transistor connected in parallel with the switch and the tamper signal input to the processor component; determining a clasp is in a clasped state based on the voltage level measured at the tamper input signal of the processor component; measuring a reference voltage level at the tamper input signal of the processor component in response to operation of the switch into a second position; determining the clasp is in an unclasped state based on the reference voltage level measured at the tamper input signal of the processor component; and altering one or more portions of data in a memory communicatively coupled with the processor component in response to determining the clasp is in the unclasped state. ### Claim 13 (depends on 12) The method of claim 12, operation of the clasp from the clasped state to the unclasped state to cause a voltage drop at the power input to the processor component. ### Claim 14 (depends on 13) The method of claim 13, operation of the clasp from the clasped state to the unclasped state to cause a voltage change at the third terminal, the voltage change at the third terminal to cause the voltage drop at the power input to the processor component. ### Claim 15 (depends on 12) The method of claim 12, the third terminal connected in parallel with a resistor connected to a negative terminal of the power source. ### Claim 16 (depends on 12) The method of claim 12, comprising erasing or overwriting the one or more portions of the data to alter the one or more portions of the data in response to the voltage change. ### Claim 17 (depends on 16) The method of claim 16, the one or more portions of the data comprising access credentials. ### Claim 18 (depends on 12) The method of claim 12, comprising providing the processor component with electric power conveyed to an antenna via an electromagnetic field, the antenna coupled to the processor component via an interface. ### Claim 19 At least one non-transitory computer-readable medium comprising a set of instructions that, in response to being executed by a processor component, cause the processor component to: measure a voltage level of a positive terminal of a power source at a tamper input signal of a processor component when a switch is in a first position, the switch connected to a first terminal of a transistor in parallel with the positive terminal of the power source, a second terminal of the transistor connected to a power input of the processor component, and a third terminal of the transistor connected in parallel with the switch and the tamper signal input to the processor component; determine a clasp is in a clasped state based on the voltage level measured at the tamper input signal of the processor component; measure a reference voltage level at the tamper input signal of the processor component in response to operation of the switch into a second position; determine the clasp is in an unclasped state based on the reference voltage level measured at the tamper input signal of the processor component; and altering one or more portions of data in a memory communicatively coupled with the processor component in response to determining the clasp is in the unclasped state. ### Claim 20 (depends on 19) The at least one non-transitory computer-readable medium of claim 19, comprising instructions that, in response to being executed by the processor component, cause the processor component to retrieve an identifier from the memory and cooperate with an interface to transmit the identifier via near field communications (NFC) to an initialization device. ### Claim 21 (depends on 20) The at least one non-transitory computer-readable medium of claim 20, comprising instructions that, in response to being executed by the processor component, cause the processor component to receive the data via NFC in response to transmission of the identifier to the initialization device and store the data in the memory. ### Claim 22 (depends on 21) The at least one non-transitory computer-readable medium of claim 21, comprising instructions that, in response to being executed by the processor component, cause the processor component to condition transmission of the data on whether the clasp has changed state from the clasped state to the unclasped state following receipt of the data via NFC and storage of the data within the memory. ### Claim 23 (depends on 20) The at least one non-transitory computer-readable medium of claim 20, comprising instructions that, in response to being executed by the processor component, cause the processor component to cooperate with the interface to transmit an indication of the state of the clasp to the initialization device via NFC. ### Claim 24 (depends on 19) The at least one non-transitory computer-readable medium of claim 19, operation of the clasp from the clasped state to the unclasped state to cause a voltage drop at the power input to the processor component. ### Claim 25 (depends on 24) The at least one non-transitory computer-readable medium of claim 24, operation of the clasp from the clasped state to the unclasped state to cause a voltage change at the third terminal, the voltage change at the third terminal to cause the voltage drop at the power input to the processor component.