# US 10,503,892 B2 · Remote attestation for multi-core processor

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- Number: US 10,503,892 B2
- Document ID: US10503892B2
- Status: Granted
- Kind: B2
- Application number: 15/632,380
- Filed: 2017-06-25
- Published: 2018-12-27
- Granted: 2019-12-10
- Earliest claimed: 2017-06-25
- Assignees: Microsoft Technology Licensing, LLC
- Applicants: Microsoft Technology Licensing, LLC
- Inventors: Felix Stefan Domke
- Web page: https://patentgrep.com/patent/US10503892B2

## CPC

- G06F 21/44: Program or device authentication
- G06F 9/4401: Bootstrapping (security arrangements therefor G06F21/57)
- G06F 21/51: at application loading time, e.g. accepting, rejecting, starting or inhibiting executable software based on integrity or source reliability
- G06F 21/57: Certifying or maintaining trusted computer platforms, e.g. secure boots or power-downs, version controls, system software checks, secure updates or assessing vulnerabilities
- G06F 21/575: {Secure boot}
- H04L 9/3236: {using cryptographic hash functions}
- H04L 9/3239: {involving non-keyed hash functions, e.g. modification detection codes [MDCs], MD5, SHA or RIPEMD}
- H04L 9/3247: {involving digital signatures}
- H04L 9/3271: {using challenge-response}
- H04L 9/50: {using hash chains, e.g. blockchains or hash trees}
- G06F 2221/2103: Challenge-response
- H04L 2209/12: Details relating to cryptographic hardware or logic circuitry
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- H04L: TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION (arrangements common to telegraphic and telephonic communication H04M)

## Abstract

The disclosed technology is generally directed to the authentication of software. In one example of the technology, a private attestation key is stored in hardware. In some examples, during a sequential boot process a hash is calculated, in an order in which the software stages are sequentially booted, of each software stage of a plurality of software stages. The hashes of each software stage of the plurality may be cryptographically appended to an accumulation register. The accumulation register may be used to attest to validity of the software stages. The plurality of software stages may include a first bootloader, a runtime for a first core of a multi-core processor, and a runtime for a first execution environment for a second core of the multi-core processor.

## Claims

### Claim 1

An apparatus, comprising:
a multi-core processor, including a first core, a second core, and at least one memory adapted to store run-time data, wherein the first core is a physical core, the second core is another physical core that is separate from the first core, and wherein the first core is adapted to execute processor-executable code that, in response to execution, enables the apparatus to perform operations, the operations including:
sequentially booting a plurality of software stages for the apparatus, including, for each software stage of the plurality of software stages:
calculating a hash of that software stage; and
cryptographically appending the hash of that software stage to an accumulation register as an update of a value of the accumulation register, wherein the plurality of software stages includes a first bootloader, a runtime for the first core of the multi-core processor, and a runtime of a first execution environment for the second core of the multi-core processor.

### Claim 2 (depends on 1)

The apparatus of claim 1, wherein the plurality of software stages further includes an operating system of a second execution environment for the second core.

### Claim 3 (depends on 1)

The apparatus of claim 1, the operations further comprising storing the challenge in another register.

### Claim 4 (depends on 1)

The apparatus of claim 1, wherein the accumulation register is arranged such that the value of the accumulation register is limited, by hardware, to being changed in one of the following enumerated manners: being reset to a default value in response to a reboot of the multi-core processor, and being changed by cryptographical appending of a hash to a current value of the accumulation register.

### Claim 5 (depends on 1)

The apparatus of claim 1, the operations further compromising making a request for an IoT service, wherein the challenge is received in response to the request.

### Claim 6 (depends on 1)

The apparatus of claim 1, wherein the first core and the second core are general purpose cores with differing capabilities, and wherein the first core and the second core are configured to have a defense-in-depth hierarchy in which the first core is above the second core in the defense-in-depth hierarchy.

### Claim 7 (depends on 1)

The apparatus of claim 1, wherein the order of the sequential boot corresponds to a defense-in-depth hierarchy.

### Claim 8 (depends on 1)

The apparatus of claim 1, wherein the first core is a secure microcontroller, and wherein the second core is a central processing unit.

### Claim 9

A method, comprising:
sequentially booting a plurality of software stages for a multi-core computing device, including, for each software stage of the plurality of software stages:
calculating a hash of that software stage; and
cryptographically appending the hash of that software stage to a register as an update of a value of the register, wherein the plurality of software stages includes a first bootloader, a runtime for a first core of the multi-core device, and a runtime of a first execution environment for a second core of the multi-core device, wherein the first core is a physical core, and wherein the second core is another physical core that is separate from the first core.

### Claim 10 (depends on 9)

The method of claim 9, wherein the plurality of software stages further includes an operating system for a second execution environment for the second core.

### Claim 11 (depends on 9)

The method of claim 9, further comprising storing the challenge in another register.

### Claim 12 (depends on 9)

The method of claim 9, further compromising making a request to an IoT support service, wherein the challenge is received in response to the request.

### Claim 13 (depends on 9)

The method of claim 9, wherein the first core and the second core are general purpose cores with differing capabilities, and wherein the first core and the second core are configured to have a defense-in-depth hierarchy in which the first core is above the second core in the defense-in-depth hierarchy.

### Claim 14 (depends on 9)

The method of claim 9, wherein the order of the sequential boot corresponds to a defense-in-depth hierarchy.

### Claim 15

A method, comprising:
receiving, by a network connected device, a request to attest to validity of a plurality of software stages executing on the network connected device; and
in response to the request, transmitting a cryptographically signed value representing the plurality of software stages, the value having been generated by a sequential appending of a hash of each software stage of the plurality of software stages, wherein the plurality of software stages includes a runtime for a first core of the network connected device, and an operating system for an execution environment for a second core of the network connected device; the first core is a physical core; and wherein the second core is another physical core that is separate from the first core.

### Claim 16 (depends on 15)

The method of claim 15, wherein the plurality of software stages further includes a bootloader for the network connected device.

### Claim 17 (depends on 15)

The method of claim 15, wherein the cryptographically signed value was generated in conjunction with a sequential booting of the plurality of software stages, and wherein at least one of the plurality of software stages was booted by another of the plurality of software stages.

### Claim 18 (depends on 15)

The method of claim 15, the further compromising:
making a request for an IoT service, wherein the request to attest to the validity is received in response to the request for the IoT service.

### Claim 19 (depends on 15)

The method of claim 15, wherein the network connected device includes a first core and a second core, wherein the first core and the second core are general purpose cores with differing capabilities, and wherein the first core and the second core are configured to have a defense-in-depth hierarchy in which the first core is above the second core in the defense-in-depth hierarchy.

### Claim 20 (depends on 15)

The method of claim 15, wherein the order of the sequential appending corresponds to a defense-in-depth hierarchy for execution environments of the network connected device.
