# US 10,503,857 B2 · Computer executing method, clock data processing system and computer readable storage medium > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,503,857 B2 - Document ID: US10503857B2 - Status: Granted - Kind: B2 - Application number: 15/956,757 - Filed: 2018-04-19 - Published: 2019-08-15 - Granted: 2019-12-10 - Earliest claimed: 2018-02-12 - Assignees: Global Unichip Corporation; Taiwan Semiconductor Manufacturing Company, Ltd. - Applicants: Global Unichip Corporation; Taiwan Semiconductor Manufacturing Co., Ltd. - Inventors: Yih-Chih Chou; Cheng-Hong Tsai; Chih-Mou Tseng - Web page: https://patentgrep.com/patent/US10503857B2 ## CPC - G06F 30/18: Network design, e.g. design based on topological or interconnect aspects of utility systems, piping, heating ventilation air conditioning [HVAC] or cabling (circuit design at the physical level G06F30/39; network planning tools for wireless communication networks H04W16/18) - G06F 30/396: Clock trees - G06F 30/327: Logic synthesis; Behaviour synthesis, e.g. mapping logic, HDL to netlist, high-level language to RTL or netlist - G06F 30/3312: Timing analysis - G06F 30/3315: using static timing analysis [STA] - G06F 30/39: Circuit design at the physical level (physical level design for reconfigurable circuits G06F30/347) - G06F 30/392: Floor-planning or layout, e.g. partitioning or placement - G06F 30/398: Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM] (optical proximity correction [OPC] design processes G03F1/36) - G06F 2111/04: Constraint-based CAD - G06F 2119/12: Timing analysis or timing optimisation - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) ## Abstract A computer executing method is provided in this disclosure. The computer executing method is configured for synthesizing a clock tree circuit, the clock tree circuit includes a plurality of clock pins, a plurality of weight values are set between any of the clock pins, the computer executing method includes steps of: establishing a graph model; utilizing a force directed algorithm to calculate a branch position according to the weight values and a position of the clock pins; setting a guide buffer in the branch position and updating a netlist; performing a clock tree synthesis (CTS) and executing a post-CTS static timing analysis (STA); determining whether an analysis result of the post-CTS STA and a timing setup value is identical or not; and if the analysis result does not match the timing setup value, re-establishing a graph model. ## Claims ### Claim 1 A computer executing method, configured for calculating a branch position of a clock tree, the clock tree comprises a plurality of clock pins, a plurality of weight values are set between any of the clock pins, the computer executing method comprising: establishing a graph model, wherein the graph model comprises a plurality of nodes and a plurality of edges, the nodes are corresponded to the clock pins and the edges are corresponded to the weight values; utilizing a force directed algorithm to calculate a branch position according to the weight values and a position of the clock pins; setting a guide buffer in the branch position and updating a netlist; performing a clock tree synthesis (CTS) and executing a post-CTS static timing analysis (STA); determining whether an analysis result of the post-CTS STA meets a setup time constraint or not; and if the analysis result does not meet the setup time constraint, re-calculating the weight values, and re-establishing a graph model according to the weight values. ### Claim 2 (depends on 1) The computer executing method of claim 1, further comprising: establishing a clock specification file according to a pre-CTS database; and generating a timing specification file according to a STA report and the clock specification file; wherein the clock specification file comprises a plurality of blocks, and the blocks comprise the clock pins and a clock source; the timing specification file comprises a data path, the data path is between any two clock pins. ### Claim 3 (depends on 2) The computer executing method of claim 2, wherein the weight values comprise a number of the data path between the blocks, and a slack value of the data path between the blocks. ### Claim 4 (depends on 3) The computer executing method of claim 3, wherein the number of the data path between the blocks are utilized to the weight values in first time establishing the graph model; after executing the post-CTS STA, the slack value of the data path between the blocks are utilized to the weight values. ### Claim 5 (depends on 4) The computer executing method of claim 4, wherein setting the guide buffer in the branch position and updating the netlist, further comprising: if the weight values is greater than a weight threshold and a distance between clock pins is less than a distance threshold, creating the guide buffer to the branch position; if not, moving the guide buffer to the branch position; and updating connecting information of the clock pins in the netlist. ### Claim 6 (depends on 4) The computer executing method of claim 4, wherein setting the guide buffer in the branch position and updating the netlist, further comprising: if the weight values is less than a weight threshold and a distance between clock pins is less than a distance threshold, creating the guide buffer to the branch position; if not, moving the guide buffer to the branch position; and updating connecting information of the clock pins in the netlist. ### Claim 7 (depends on 2) The computer executing method of claim 2, wherein generating the timing specification file according to a pre-layout STA result in first time executing the CTS; generating the timing specification file according to the STA report after executing the post-CTS STA. ### Claim 8 A clock data processing system, configured for calculating a branch position of a clock tree, the clock tree comprises a plurality of clock pins, a plurality of weight values are set between any of the clock pins, the clock data processing system comprising: a data storage unit, configured for storing the clock pins and the weight values; and a processor, electrically coupled to the data storage unit, and configured for establishing a graph model and utilizing a force directed algorithm to calculate a branch position according to the weight values and a position of the clock pins; the processor is configured for setting a guide buffer in the branch position and updating a netlist, and performing a clock tree synthesis (CTS) and executing a post-CTS static timing analysis (STA); the processor is configured for determining whether an analysis result of the post-CTS STA meets a setup time constraint or not, if not, re-calculating the weight values, and re-establishing a graph model according to the weight values; wherein the graph model comprises a plurality of nodes and a plurality of edges, the nodes are corresponded to the clock pins and the edges are corresponded to the weight values. ### Claim 9 (depends on 8) The clock data processing system of claim 8, wherein the data storage unit is configured for storing a pre-CTS database and a STA report; the processor is configured for establishing a clock specification file according to the pre-CTS database, and generating a timing specification file according to the STA report and the clock specification file; wherein the clock specification file comprises a plurality of blocks, and the blocks comprise the clock pins and a clock source; the timing specification file comprises a data path, the data path is between any two clock pins. ### Claim 10 (depends on 9) The clock data processing system of claim 9, wherein the weight values comprise a number of the data path between the blocks, and a slack value of the data path between the blocks. ### Claim 11 (depends on 10) The clock data processing system of claim 10, wherein the number of the data path between the blocks are utilized to the weight values in first time establishing the graph model; after executing the post-CTS STA, the slack value of the data path between the blocks are utilized to the weight values. ### Claim 12 (depends on 11) The clock data processing system of claim 11, the processor is configured for setting the guide buffer in the branch position and updating the netlist, the processor is further executing following operations: if the weight values is greater than a weight threshold and a distance between clock pins is less than a distance threshold, creating the guide buffer to the branch position; if not, moving the guide buffer to the branch position; and updating connecting information of the clock pins in the netlist. ### Claim 13 (depends on 11) The clock data processing system of claim 11, the processor is configured for setting the guide buffer in the branch position and updating the netlist, the processor is further executing following operations: if the weight values is less than a weight threshold and a distance between clock pins is less than a distance threshold, creating the guide buffer to the branch position; if not, moving the guide buffer to the branch position; and updating connecting information of the clock pins in the netlist. ### Claim 14 (depends on 9) The clock data processing system of claim 9, wherein generating the timing specification file according to a pre-layout STA result in first time executing the CTS; generating the timing specification file according to the STA report after executing the post-CTS STA. ### Claim 15 A computer readable storage medium storing a computer program, the computer program is configured for loading in a computer system, and calculating a branch position of a clock tree, the clock tree comprises a plurality of clock pins, a plurality of weight values are set between any of the clock pins, the computer program is configured for performing a computer executing method, wherein the computer executing method comprises: establishing a graph model, wherein the graph model comprises a plurality of nodes and a plurality of edges, the nodes are corresponded to the clock pins and the edges are corresponded to the weight values; utilizing a force directed algorithm to calculate a branch position according to the weight values and a position of the clock pins; setting a guide buffer in the branch position and updating a netlist; performing a clock tree synthesis (CTS) and executing a post-CTS static timing analysis (STA); determining whether an analysis result of the post-CTS STA meets a setup time constraint or not; and if the analysis result does not meet the setup time constraint, re-calculating the weight values, and re-establishing a graph model according to the weight values. ### Claim 16 (depends on 15) The computer readable storage medium of claim 15, further comprising: establishing a clock specification file according to a pre-CTS database; and generating a timing specification file according to a STA report and the clock specification file; wherein the clock specification file comprises a plurality of blocks, and the blocks comprise the clock pins and a clock source; the timing specification file comprises a data path, the data path is between any two clock pins; wherein generating the timing specification file according to a pre-layout STA result in first time executing the CTS; generating the timing specification file according to the STA report after executing the post-CTS STA. ### Claim 17 (depends on 16) The computer readable storage medium of claim 16, wherein the weight values comprise a number of the data path between the blocks, and a slack value of the data path between the blocks. ### Claim 18 (depends on 17) The computer readable storage medium of claim 17, wherein the number of the data path between the blocks are utilized to the weight values in first time establishing the graph model; after executing the post-CTS STA, the slack value of the data path between the blocks are utilized to the weight values. ### Claim 19 (depends on 18) The computer readable storage medium of claim 18, wherein setting the guide buffer in the branch position and updating the netlist, further comprising: if the weight values is greater than a weight threshold and a distance between clock pins is less than a distance threshold, creating the guide buffer to the branch position; if not, moving the guide buffer to the branch position; and updating connecting information of the clock pins in the netlist. ### Claim 20 (depends on 18) The computer readable storage medium of claim 18, wherein setting the guide buffer in the branch position and updating the netlist, further comprising: if the weight values is less than a weight threshold and a distance between clock pins is less than a distance threshold, creating the guide buffer to the branch position; if not, moving the guide buffer to the branch position; and updating connecting information of the clock pins in the netlist.