# US 10,503,855 B2 · Methods and systems for system design automation (SDA) of mixed signal electronic circuitry including embedded software designs > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,503,855 B2 - Document ID: US10503855B2 - Status: Granted - Kind: B2 - Application number: 15/878,342 - Filed: 2018-01-23 - Published: 2018-08-02 - Granted: 2019-12-10 - Earliest claimed: 2017-01-23 - Applicants: Concertal Systems, Inc. - Inventors: Robert Charles Ledzius; Robert James Stoddard; Greg Allen Hupp; Shalini Batra Sahni - Web page: https://patentgrep.com/patent/US10503855B2 ## CPC - G06F 30/343: Logical level - G06F 16/212: {with details for data modelling support} - G06F 16/284: {Relational databases} - G06F 30/30: Circuit design - G06F 30/327: Logic synthesis; Behaviour synthesis, e.g. mapping logic, HDL to netlist, high-level language to RTL or netlist - G06F 30/33: Design verification, e.g. functional simulation or model checking - G06F 30/3323: using formal methods, e.g. equivalence checking or property checking - G06F 30/34: for reconfigurable circuits, e.g. field programmable gate arrays [FPGA] or programmable logic devices [PLD] - G06F 30/36: Circuit design at the analogue level - G06F 30/367: Design verification, e.g. using simulation, simulation program with integrated circuit emphasis [SPICE], direct methods or relaxation methods - G06F 30/38: Circuit design at the mixed level of analogue and digital signals - G06F 2111/02: CAD in a network environment, e.g. collaborative CAD or distributed simulation - G06F 2115/08: Intellectual property [IP] blocks or IP cores - G06F 2119/20: Design reuse, reusability analysis or reusability optimisation - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) ## Abstract Methods and systems for SDA of mixed signal electronic circuitry including embedded software designs for creating ASICs, sub-systems, and SoCs. The SDA system described extends IP reuse beyond the circuit and stand-alone verification capabilities that are common practice today which limit the benefits of reuse. By solving the integration problem first in a loosely coupled manner, complex mixed signal SoC devices may achieve higher levels of IP reuse with push button ease through the cloud, significantly improving time to market, design resource limitations, risks for first time silicon success, and the tasks of managing business multiple relationships of IP providers. SDA generated designs use a multi-agent method of operation, creating powerful and flexible designs that provide both NOC (Network on a Chip) and NBC (Network Beyond the Chip) for distributed system operation, and enhanced non-intrusive in-system monitoring for mission critical and safety related applications. ## Claims ### Claim 1 A method for system design automation (SDA) of mixed signal electronic circuitry and software, comprising the steps of: generating a networked plurality of mixed signal circuitry and software sockets for instantiating from system integration database entries for mixed signal circuitry and software functional IP module blocks, further comprising the steps of: presenting event wire and communication data outputs of hardware and software functional IP with identifiers according to output schema; implementing configurable input select control circuitry and/or software for providing inputs of hardware and software functional IP using event wire and communication data output identifiers according to input schema; implementing configurable mode control registers, memory contents, and/or parameters for providing functional IP module block functional modifiers according to mode schema; assembling said mixed signal circuitry and software wrappers into an SDA generated design using a combination of network on a chip and/or software operating system and/or network beyond a chip to allow functional IP modules to operate together as a system. ### Claim 2 (depends on 1) The method of claim 1 for automatically generating the design from a plurality of predetermined programs or scripts. ### Claim 3 (depends on 2) The method of claim 2, further comprising the steps of automatically executing a plurality of inherited scripts providing stimuli and self-checks from a set of predetermined IP module containers for verifying through simulation and/or validating through emulation implemented IP modules within their integrated form for automatically generated designs. ### Claim 4 (depends on 1) The method of claim 1, further comprising the step of implementing hardware circuit wrappers and/or software OS for connecting SDA integration network to functional mixed signal hardware and/or software IP imported into said IP containers as defined in the database schema. ### Claim 5 (depends on 1) The method of claim 1, further comprising the steps of: organizing and storing said mixed signal circuitry and software IP module design files into IP containers; and accessing said IP containers using a predetermined version control software system. ### Claim 6 (depends on 1) The method of claim 1, further comprising the step of providing a community based collaborative site based on our SDA methods. ### Claim 7 (depends on 1) The method of claim 1, further comprising the step of providing acollective system verification scripts driven design optimizations. ### Claim 8 (depends on 7) The method of claim 7, further comprising the step of forming said mixed signal circuitry and software wrappers into a relational database form. ### Claim 9 (depends on 8) The method of claim 8, further comprising the step of forming said mixed signal circuitry and software wrappers as absolute or relative IP tools. ### Claim 10 (depends on 9) The method of claim 9, further comprising the step of representing said IP tools in a cloud-based database for facilitating automation of said mixed circuitry and software IP tools. ### Claim 11 A system for system design automation (SDA) of mixed signal electronic circuitry and software, comprising: a networked plurality of mixed signal circuitry and software sockets for instantiating from system integration database entries for mixed signal circuitry and software functional IP module blocks, further comprising the steps of: event wire and communication data outputs of hardware and software functional IP presented with identifiers according to output schema; configurable input select control circuitry and/or software implemented for providing inputs of hardware and software functional IP using event wire and communication data output identifiers according to input schema; configurable mode control registers, memory contents, and/or parameters implemented for providing functional IP module block functional modifiers according to mode schema; said mixed signal circuitry and software wrappers assembled into an SDA generated design using a combination of network on a chip and/or software operating system and/or network beyond a chip to allow functional IP modules to operate together as a system. ### Claim 12 (depends on 11) The system of claim 11, further comprising said design automatically generated from a plurality of predetermined programs or scripts. ### Claim 13 (depends on 12) The system of claim 12, further comprising a plurality of inherited scripts providing stimuli and self-checks automatically executed from a set of predetermined IP module containers for verifying through simulation and/or validating through emulation implemented IP modules within their integrated form for automatically generated designs. ### Claim 14 (depends on 11) The system of claim 11, further comprising hardware circuit wrappers and/or software OS for connecting SDA integration network to functional mixed signal hardware and/or software IP imported into said IP containers as defined in the database schema. ### Claim 15 (depends on 11) The system of claim 11, further comprising: IP containers fororganizing and storing said mixed signal circuitry and software IP module design files into; and a predetermined version control software system for accessing said IP containers. ### Claim 16 (depends on 11) The system of claim 11, further comprising a community based collaborative site based on our SDA methods. ### Claim 17 (depends on 11) The system of claim 11, further comprising a predetermined set of collective system verification scripts driven design optimizations. ### Claim 18 (depends on 11) The system of claim 11, further comprising said mixed signal circuitry and software wrappers formed into a relational database form. ### Claim 19 (depends on 11) The system of claim 11, further comprising said mixed signal circuitry and software wrappers formed as absolute or relative IP tools. ### Claim 20 (depends on 11) The system of claim 11, further comprising said IP tools operating in a cloud-based database for facilitating automation of said mixed circuitry and software IP tools.