# US 10,503,666 B2 · Method for operating a microcontroller > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,503,666 B2 - Document ID: US10503666B2 - Status: Granted - Kind: B2 - Application number: 15/775,239 - Filed: 2016-11-07 - Published: 2018-11-08 - Granted: 2019-12-10 - Earliest claimed: 2015-11-25 - Assignees: Robert Bosch GmbH - Applicants: Robert Bosch GmbH - Inventors: Jens Gladigau; Simon Hufnagel - Web page: https://patentgrep.com/patent/US10503666B2 ## CPC - G06F 12/1483: {using an access-table, e.g. matrix or list} - G06F 12/1441: {for a range} - G06F 12/1491: {in a hierarchical protection system, e.g. privilege levels, memory rings} - G06F 21/79: in semiconductor storage media, e.g. directly-addressable memories - G06F 2221/2141: Access rights, e.g. capability lists, access control lists, access tables, access matrices - G06F 2221/2149: Restricted operating environment - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) ## Abstract A method for operating a microcontroller, where access rights of processes executed in the microcontroller to different memory areas are stored in a memory protection unit, includes, in the course of a simulation mode, a first process carrying out an access attempt to a certain memory area in a certain manner in the name of a second process; the memory protection unit transferring access rights of the second process for the certain memory area to the first process upon the access attempt. The access rights are read out by the first process and the simulation mode is terminated. The access attempt is preferably thereupon terminated and an access is not carried out according to this access attempt by the first process. ## Claims ### Claim 1 A method for operating a microcontroller, wherein access rights of processes that are executable by the microcontroller for accessing a plurality of memory areas are stored in a memory protection unit, the method comprising: during a simulation mode of the memory protection unit: executing, by the microcontroller, a first one of the processes that carries out an attempt to access via the memory protection unit, on behalf of a second one of the processes and with a particular one of a plurality of access types, one of the plurality of memory areas, the second process being separate from the first process; and responsive to the access attempt, transferring, by the memory protection unit and to the first process, an indication of the access rights of the second process for the one of the plurality of memory areas; wherein the memory protection unit is a hardware unit, the hardware unit being a hardware memory protection unit, the hardware memory protection unit being separate from and external to the microcontroller. ### Claim 2 (depends on 1) The method of claim 1, wherein the access, whose attempt had been carried out, is not carried out in response to the attempt, and the simulation mode is terminated following the transfer. ### Claim 3 (depends on 1) The method of claim 1, wherein the access attempt is of a read access. ### Claim 4 (depends on 3) The method of claim 3, wherein the transfer includes writing of the indication of the access rights into a local memory of a processor core executing the first process, which local memory is specified as a target of the read access. ### Claim 5 (depends on 1) The method of claim 1, wherein the simulation mode is carried out by the memory protection unit being put into the simulation mode by a simulation start command. ### Claim 6 (depends on 1) The method of claim 1, wherein the simulation mode is carried out by the access attempt being carried out using a simulation access command. ### Claim 7 (depends on 1) The method of claim 1, further comprising initiating the simulation mode responsive to the memory protection unit recognizing that the second process attempts to access the one of the plurality of memory areas in a manner which is not permitted to the second process, the initiation including the memory protection unit informing the first process of the attempt by the second process. ### Claim 8 (depends on 7) The method of claim 7, further comprising the first process deciding based on the transferred indication of the access rights whether the attempted access by the second process can be executed. ### Claim 9 (depends on 1) The method of claim 1, wherein the first process has greater access rights to the plurality of memory areas than the second process. ### Claim 10 (depends on 1) The method of claim 1, wherein the memory protection unit is connected to the microcontroller. ### Claim 11 A device comprising: a memory protection unit, the memory protection unit being a hardware unit and being a hardware memory protection unit; and a microcontroller configured to: execute a plurality of processes, wherein access rights of the processes for accessing a plurality of memory areas are stored in a memory protection unit; and during a simulation mode of the memory protection unit, execute a first one of the processes, which execution includes the first process carrying out an attempt to access via the memory protection unit, on behalf of a second one of the processes and with a particular one of a plurality of access types, one of the plurality of memory areas, wherein responsive to the access attempt, the memory protection unit transfers to the first process an indication of the access rights of the second process for the one of the plurality of memory areas, the first process being separate from the second process; wherein the hardware memory protection unit is separate from and external to the microcontroller. ### Claim 12 A non-transitory computer-readable medium on which are stored instructions that are executable by a processor and that, when executed by the processor, cause the processor to perform a method for operating a microcontroller, wherein access rights of processes that are executable by the microcontroller for accessing a plurality of memory areas are stored in a memory protection unit, the method comprising: during a simulation mode of the memory protection unit: executing a first one of the processes that carries out an attempt to access via the memory protection unit, on behalf of a second one of the processes and with a particular one of a plurality of access types, one of the plurality of memory areas, the first process being separate from the second process; and responsive to the access attempt, transferring by the memory protection unit to the first process an indication of the access rights of the second process for the one of the plurality of memory areas; wherein the memory protection unit is a hardware unit, the hardware unit being a hardware memory protection unit, the hardware memory protection unit being separate from and external to the microcontroller.