# US 10,503,656 B2 · Performance by retaining high locality data in higher level cache memory

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- Number: US 10,503,656 B2
- Document ID: US10503656B2
- Status: Granted
- Kind: B2
- Application number: 15/709,884
- Filed: 2017-09-20
- Published: 2019-03-21
- Granted: 2019-12-10
- Earliest claimed: 2017-09-20
- Assignees: QUALCOMM Incorporated
- Applicants: QUALCOMM Incorporated
- Inventors: Farrukh Hijaz; George Patsilaras
- Web page: https://patentgrep.com/patent/US10503656B2

## CPC

- G06F 11/3409: {for performance assessment}
- G06F 12/0897: with two or more cache hierarchy levels (with multilevel cache hierarchies G06F12/0811)
- G06F 11/34: Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation {; Recording or statistical evaluation of user activity, e.g. usability assessment}
- G06F 11/348: {Circuit details, i.e. tracer hardware}
- G06F 12/0811: with multilevel cache hierarchies
- G06F 12/0877: Cache access modes
- G06F 12/0891: using clearing, invalidating or resetting means
- G06F 12/126: with special data handling, e.g. priority of data or instructions, handling errors or pinning
- G06F 12/128: adapted to multidimensional cache systems, e.g. set-associative, multicache, multiset or multilevel
- G06F 2201/88: Monitoring involving counting
- G06F 2201/885: Monitoring specific for caches
- G06F 2212/1024: Latency reduction
- G06F 2212/1028: Power efficiency
- G06F 2212/60: Details of cache memory
- Y02D 10/00: Energy efficient computing, e.g. low power processors, power management or thermal management
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- Y02D: CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE

## Abstract

Various aspects include methods for implementing retaining high locality data in a higher level cache memory on a computing device. Various aspects may include receiving a cache access request for a first cache line in the higher level cache memory indicating a locality of the first cache line, determining whether the access request indicates high locality, and setting a high locality indicator of the first cache line in response to determining that the cache access request indicates high locality. Various aspects may include determining whether a lower level cache memory hit counter of a first cache line of a first cache exceeds a lower level cache locality threshold, setting a high locality indicator of the first cache line in response to determining that the lower level cache memory hit counter exceeds the lower level cache locality threshold and resetting the lower level cache memory hit counter of the first cache.

## Claims

### Claim 1

A method of retaining high locality data in a higher level cache memory on a computing device, comprising:
receiving a cache access request for a first cache line, wherein the first cache line is located in the higher level cache memory and wherein the cache access request indicates a locality of the first cache line;
determining whether the cache access request indicating the locality of the first cache line indicates that the first cache line has high locality; and
setting a high locality indicator of the first cache line in the higher level cache memory in response to determining that the cache access request indicates that the first cache line has high locality.

### Claim 2 (depends on 1)

The method of claim 1, further comprising:
selecting the first cache line as a victim cache line candidate;
determining whether the high locality indicator of the first cache line is set;
evicting the first cache line in response to determining that the high locality indicator of the first cache line is not set; and
selecting a second cache line as the victim cache line candidate in response to determining that the high locality indicator of the first cache line is set.

### Claim 3 (depends on 1)

The method of claim 1, further comprising:
determining whether to promote the first cache line to having high locality in response to determining that the cache access request indicates that the first cache line has high locality, wherein setting a high locality indicator of the first cache line in the higher level cache memory comprises setting the high locality indicator of the first cache line in the higher level cache memory in response to determining to promote the first cache line to having high locality; and
resetting the high locality indicator of the first cache line in the higher level cache memory in response to determining to not promote the first cache line to having high locality.

### Claim 4 (depends on 1)

The method of claim 1, further comprising determining whether promoting the first cache line to having high locality exceeds a cache set promote threshold in response to determining that the cache access request indicates that the first cache line has high locality,
wherein setting a high locality indicator of the first cache line in the higher level cache memory comprises setting the high locality indicator of the first cache line in the higher level cache memory in response to determining that promoting the first cache line to having high locality does not exceed the cache set promote threshold.

### Claim 5 (depends on 4)

The method of claim 4, further comprising resetting a high locality indicator of a second cache line in the higher level cache memory in response to determining that promoting the first cache line to having high locality exceeds the cache set promote threshold.

### Claim 6 (depends on 5)

The method of claim 5, further comprising determining whether a high locality counter for the higher level cache memory exceeds a demote threshold,
wherein resetting a high locality indicator of a second cache line in the higher level cache memory comprises resetting the high locality indicator of the second cache line in the higher level cache memory in response to determining that the high locality counter for the higher level cache memory exceeds the demote threshold.

### Claim 7 (depends on 1)

The method of claim 1, further comprising:
determining whether a cache line high locality counter exceeds a cache line demote threshold; and
resetting the high locality indicator of the first cache line in the higher level cache memory in response to determining that the cache line high locality counter exceeds the cache line demote threshold.

### Claim 8 (depends on 1)

The method of claim 1, further comprising resetting the high locality indicator of the first cache line in the higher level cache memory in response to determining that the cache access request does not indicate the first cache line has high locality.

### Claim 9

A computing device, comprising:
a processor;
a higher level cache memory;
a lower level cache memory; and
a cache memory manager communicatively connected to the processor, the higher level cache memory, and the lower level cache memory, and configured to perform operations comprising:
receiving a cache access request for a first cache line, wherein the first cache line is located in the higher level cache memory and wherein the cache access request indicates a locality of the first cache line;
determining whether the cache access request indicating the locality of the first cache line indicates that the first cache line has high locality; and
setting a high locality indicator of the first cache line in the higher level cache memory in response to determining that the cache access request indicates that the first cache line has high locality.

### Claim 10 (depends on 9)

The computing device of claim 9, wherein the cache memory manager is configured to perform operations further comprising:
selecting the first cache line as a victim cache line candidate;
determining whether the high locality indicator of the first cache line is set;
evicting the first cache line in response to determining that the high locality indicator of the first cache line is not set; and
selecting a second cache line as the victim cache line candidate in response to determining that the high locality indicator of the first cache line is set.

### Claim 11 (depends on 9)

The computing device of claim 9, wherein the cache memory manager is configured to perform operations further comprising:
determining whether to promote the first cache line to having high locality in response to determining that the cache access request indicates that the first cache line has high locality, wherein setting a high locality indicator of the first cache line in the higher level cache memory comprises setting the high locality indicator of the first cache line in the higher level cache memory in response to determining to promote the first cache line to having high locality; and
resetting the high locality indicator of the first cache line in the higher level cache memory in response to determining to not promote the first cache line to having high locality.

### Claim 12 (depends on 9)

The computing device of claim 9, wherein the cache memory manager is configured to perform operations further comprising determining whether promoting the first cache line to having high locality exceeds a cache set promote threshold in response to determining that the cache access request indicates that the first cache line has high locality,
wherein the cache memory manager is configured to perform operations such that setting a high locality indicator of the first cache line in the higher level cache memory comprises setting the high locality indicator of the first cache line in the higher level cache memory in response to determining that promoting the first cache line to having high locality does not exceed the cache set promote threshold.

### Claim 13 (depends on 12)

The computing device of claim 12, wherein the cache memory manager is configured to perform operations further comprising resetting a high locality indicator of a second cache line in the higher level cache memory in response to determining that promoting the first cache line to having high locality exceeds the cache set promote threshold.

### Claim 14 (depends on 13)

The computing device of claim 13, wherein the cache memory manager is configured to perform operations further comprising determining whether a high locality counter for the higher level cache memory exceeds a demote threshold,
wherein the cache memory manager is configured to perform operations such that resetting a high locality indicator of a second cache line in the higher level cache memory comprises resetting the high locality indicator of the second cache line in the higher level cache memory in response to determining that the high locality counter for the higher level cache memory exceeds the demote threshold.

### Claim 15 (depends on 9)

The computing device of claim 9, wherein the cache memory manager is configured to perform operations further comprising:
determining whether a cache line high locality counter exceeds a cache line demote threshold;
resetting the high locality indicator of the first cache line in the higher level cache memory in response to determining that the cache line high locality counter exceeds the cache line demote threshold; and
resetting the high locality indicator of the first cache line in the higher level cache memory in response to determining that the cache access request does not indicate the first cache line has high locality.