# US 10,503,653 B2 · Memory system

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- Number: US 10,503,653 B2
- Document ID: US10503653B2
- Status: Granted
- Kind: B2
- Application number: 15/064,772
- Filed: 2016-03-09
- Published: 2017-03-16
- Granted: 2019-12-10
- Earliest claimed: 2015-09-11
- Assignees: Toshiba Memory Corporation
- Applicants: Toshiba Memory Corporation
- Inventors: Lanyin Hsu; Naomi Takeda; Hiroshi Yao
- Web page: https://patentgrep.com/patent/US10503653B2

## CPC

- G06F 12/0246: {in block erasable memory, e.g. flash memory}
- G06F 12/0888: using selective caching, e.g. bypass
- G06F 3/0604: {Improving or facilitating administration, e.g. storage management}
- G06F 3/064: {Management of blocks}
- G06F 3/0659: {Command handling arrangements, e.g. command buffers, queues, command scheduling}
- G06F 3/0685: {Hybrid storage combining heterogeneous device types, e.g. hierarchical storage, hybrid arrays}
- G06F 12/0868: Data transfer between cache memory and other subsystems, e.g. storage devices or host systems
- G06F 2212/222: Non-volatile memory
- G06F 2212/604: Details relating to cache allocation
- G06F 2212/7201: Logical to physical mapping or translation of blocks or pages
- G06F 2212/7203: Temporary buffering, e.g. using volatile buffer or dedicated buffer blocks
- G06F 2212/7207: management of metadata or control data
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)

## Abstract

According to one embodiment, a controller transmits a response to a write request to a host before executing matching between first management information and second management information.

## Claims

### Claim 1

A memory system connectable to a host, the memory system comprising:
a first nonvolatile memory;
a second nonvolatile memory having less storage capacity and a smaller latency than the first nonvolatile memory;
a first table that stores first management information representing a correspondence relation between logical addresses of data stored in the first nonvolatile memory and physical addresses of the first nonvolatile memory;
a second table that stores second management information representing a correspondence relation between logical addresses of data stored in the second nonvolatile memory and physical addresses of the second nonvolatile memory; and
a controller configured to
in response to a first write request from the host, store first data into the first nonvolatile memory or the second nonvolatile memory, the first data being specified by the first write request,
in response to a second write request from the host, the second request being a write request that is next after the first write request,
in a case where a size of the first data specified by the first write request is more than or equal to a first threshold and a size of second data specified by the second write request is less than the first threshold, store the second data into the second nonvolatile memory, execute a first matching process, the first matching process including comparing the logical addresses included in the second management information with the logical addresses included in the first management information and invalidating a correspondence relation of a first logical address in the second management information that matches one of the logical addresses in the first management information, update the second management information of the second table by third management information after executing the first matching process, and transmit a response to the second write request to the host, the third management information representing a correspondence relation between a logical address of the second data and a physical address of the second nonvolatile memory in which the second data is stored,
in a case where the size of the first data is less than the first threshold and the size of the second data is less than the first threshold, store the second data into the second nonvolatile memory, update the second management information of the second table by the third management information without comparing the logical addresses included in the second management information with the logical addresses included in the first management information, and transmit the response to the second write request to the host,
in a case where the size of the first data is less than the first threshold and the size of the second data is more than or equal to the first threshold, store the second data into the first nonvolatile memory, execute a second matching process, the second matching process including comparing the logical addresses included in the first management information with the logical addresses included in the second management information and invalidating a correspondence relation of a second logical address in the first management information that matches one of the logical addresses in the second management information, update the first management information of the first table by the third management information after executing the second matching process, and transmit the response to the second write request to the host, and
in a case where the size of the first data is more than or equal to the first threshold and the size of the second data is more than or equal to the first threshold, store the second data into the first nonvolatile memory, update the first management information of the first table by the third management information without comparing the logical addresses included in the second management information with the logical addresses included in the first management information, and transmit the response to the second write request to the host.

### Claim 2 (depends on 1)

The memory system according to claim 1, wherein, in the case where the size of the first data is less than the first threshold, the controller stores the first data into the second nonvolatile memory, and in the case where the size of the first data is more than or equal to the first threshold, the controller stores the first data into the first nonvolatile memory.

### Claim 3 (depends on 1)

The memory system according to claim 1, wherein the controller executes the first matching process or the second matching process when a number of certain units of data stored in the second nonvolatile memory exceeds a second threshold.

### Claim 4 (depends on 3)

The memory system according to claim 3, wherein, when the number of certain units of data stored in the second nonvolatile memory exceeds the second threshold, the controller reads the data stored in the second nonvolatile memory and writes the read data into the first nonvolatile memory.

### Claim 5 (depends on 1)

The memory system according to claim 1, further comprising a queue including a storage area in which a certain number of logical addresses of data stored in the second nonvolatile memory can be stored,
wherein the controller executes the first matching process or the second matching process when a number of the logical addresses stored in the storage area of the queue exceeds a third threshold.

### Claim 6 (depends on 5)

The memory system according to claim 5, after the first matching process or the second matching process is executed, when the number of the logical addresses stored in the storage area of the queue exceeds the third threshold, the controller reads the data stored in the second nonvolatile memory and writes the read data into the first nonvolatile memory.

### Claim 7 (depends on 1)

The memory system according to claim 1,
wherein the first nonvolatile memory includes a plurality of blocks, each of the plurality of blocks being a unit of data erasing, and
wherein the controller executes the first matching process or the second matching process before executing a first processing, the first processing including reading valid data from a plurality of first blocks including valid data and invalid data among the plurality of blocks and writing the read valid data into an erased second block that is different from the first blocks.

### Claim 8 (depends on 1)

The memory system according to claim 1, wherein the first nonvolatile memory is NAND type flash memory, and the second nonvolatile memory is MRAM.

### Claim 9

A method of controlling a first nonvolatile memory and a second nonvolatile memory, the second nonvolatile memory having less storage capacity and a smaller latency than the first nonvolatile memory, the method comprising:
storing first management information representing a correspondence relation between logical addresses of data stored in the first nonvolatile memory and physical addresses of the first nonvolatile memory into a first table;
storing second management information representing a correspondence relation between logical addresses of data stored in the second nonvolatile memory and physical addresses of the second nonvolatile memory into a second table;
in response to a first write request from a host, storing first data into the first nonvolatile memory or the second nonvolatile memory, the first data being specified by the first write request; and
in response to a second write request from the host, the second request being a write request that is next after the first write request,
in a case where a size of the first data specified by the first write request is more than or equal to a first threshold and a size of second data specified by the second write request is less than the first threshold, storing the second data into the second nonvolatile memory, executing a first matching process, the first matching process including comparing the logical addresses included in the second management information with the logical addresses included in the first management information and invalidating a correspondence relation of a first logical address in the second management information that matches one of the logical addresses in the first management information, updating the second management information of the second table by third management information after executing the first matching process, and transmitting a response to the second write request to the host, the third management information representing a correspondence relation between a logical address of the second data and a physical address of the second nonvolatile memory in which the second data is stored,
in a case where the size of the first data is less than the first threshold and the size of the second data is less than the first threshold, storing the second data into the second nonvolatile memory, updating the second management information of the second table by the third management information without comparing the logical addresses included in the second management information with the logical addresses included in the first management information, and transmitting the response to the second write request to the host,
in a case where the size of the first data is less than the first threshold and the size of the second data is more than or equal to the first threshold, storing the second data into the first nonvolatile memory, executing a second matching process, the second matching process including comparing the logical addresses included in the first management information with the logical addresses included in the second management information and invalidating a correspondence relation of a second logical address in the first management information that matches one of the logical addresses in the second management information, updating the first management information of the first table by the third management information after executing the second matching process, and transmitting the response to the second write request to the host, and
in a case where the size of the first data is more than or equal to the first threshold and the size of the second data is more than or equal to the first threshold, storing the second data into the first nonvolatile memory, updating the first management information of the first table by the third management information without comparing the logical addresses included in the second management information with the logical addresses included in the first management information, and transmitting the response to the second write request to the host.

### Claim 10 (depends on 9)

The method according to claim 9, further comprising,
in the case where the size of the first data is less than the first threshold, storing the first data into the second nonvolatile memory, and
in the case where the size of the first data is more than the first threshold, storing the first data into the first nonvolatile memory.

### Claim 11 (depends on 9)

The method according to claim 9, further comprising executing the first matching process or the second matching process when a number of certain units of data stored in the second nonvolatile memory exceeds a second threshold.

### Claim 12 (depends on 11)

The method according to claim 11, further comprising,
when the number of certain units of data stored in the second nonvolatile memory exceeds the second threshold, reading the data stored in the second nonvolatile memory and writing the read data into the first nonvolatile memory.

### Claim 13 (depends on 9)

The method according to claim 9, further comprising executing the first matching process or the second matching process when a number of the logical addresses stored in a storage area of a queue exceeds a third threshold, the queue including the storage area in which a certain number of logical addresses of data stored in the second nonvolatile memory can be stored.

### Claim 14 (depends on 13)

The method according to claim 13, further comprising,
after the first matching process or the second matching process is executed, when the number of the logical addresses stored in the storage area of the queue exceeds the third threshold, reading the data stored in the second nonvolatile memory and writing the read data into the first nonvolatile memory.

### Claim 15 (depends on 9)

The method according to claim 9, wherein the first nonvolatile memory includes a plurality of blocks, each of the plurality of blocks being a unit of data erasing, and the method further comprising
executing the first matching process or the second matching process before executing a first processing, the first processing including reading valid data from a plurality of first blocks including valid data and invalid data among the plurality of blocks and writing the read valid data into an erased second block that is different from the first blocks.

### Claim 16 (depends on 9)

The method according to claim 9, wherein the first nonvolatile memory is NAND type flash memory, and the second nonvolatile memory is MRAM.