# US 10,503,239 B2 · Electronic device and power management method > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,503,239 B2 - Document ID: US10503239B2 - Status: Granted - Kind: B2 - Application number: 15/905,824 - Filed: 2018-02-27 - Published: 2019-02-28 - Granted: 2019-12-10 - Earliest claimed: 2017-08-29 - Assignees: Toshiba Memory Corporation - Applicants: Toshiba Memory Corporation - Inventors: Akinori Bito - Web page: https://patentgrep.com/patent/US10503239B2 ## CPC - G06F 1/325: {Power saving in peripheral device} - G06F 1/3209: Monitoring remote activity, e.g. over telephone lines or network connections - G06F 1/3215: Monitoring of peripheral devices - G06F 1/3278: {Power saving in modem or I/O interface} - G06F 3/0625: {Power saving in storage systems} - H04L 12/00: Data switching networks (interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units G06F13/00) - H04L 12/12: Arrangements for remote connection or disconnection of substations or of equipment thereof - Y02D 10/00: Energy efficient computing, e.g. low power processors, power management or thermal management - Y02D 30/50: in wire-line communication networks, e.g. low power modes or reduced link rate - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) - H04L: TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION (arrangements common to telegraphic and telephonic communication H04M) - Y02D: CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE ## Abstract An electronic device is connectable with a host via a serial interface including a link configured with a plurality of lanes, each of which includes a differential signal wire pair for transmission and a differential signal wire pair for reception. The electronic device includes a plurality of transmitter circuits that respectively transmit data via the differential signal wire pair for transmission of each of the corresponding lanes, a plurality of receiver circuits that respectively receive data via the differential signal wire pair for reception of each of the corresponding lanes, and a control circuit. The control circuit causes a state of the electronic device to transition from a normal operation state to a state in which the plurality of transmitter circuits are maintained in an active state and the plurality of receiver circuits are in an inactive state except for one receiver circuit corresponding to one of the lanes. ## Claims ### Claim 1 An electronic device which is connectable with a host via a serial interface including a link configured with a plurality of lanes, each of which includes a differential signal wire pair for transmission and a differential signal wire pair for reception, the device comprising: a plurality of transmitter circuits that respectively correspond to the plurality of lanes, and is configured to transmit data via the differential signal wire pair for transmission of each of the corresponding lanes; a plurality of receiver circuits that respectively correspond to the plurality of lanes, and is configured to receive data via the differential signal wire pair for reception of each of the corresponding lanes; and a control circuit configured to allow a state of the electronic device to transition from a normal operation state in which the plurality of transmitter circuits and the plurality of receiver circuits are in an active state, to a first low-power state in which the plurality of transmitter circuits are maintained in an active state and the plurality of receiver circuits are in an inactive state except for one of the receiver circuits corresponding to one lane among the plurality of lanes. ### Claim 2 (depends on 1) The electronic device according to claim 1, wherein the one lane among the plurality of lanes is a lane to which lane number 0 is assigned. ### Claim 3 (depends on 1) The electronic device according to claim 1, wherein the control circuit is configured to allow the state of the electronic device to transition from the normal operation state to the first low-power state, in a case where data to be transmitted to the host does not exist for a first period. ### Claim 4 (depends on 1) The electronic device according to claim 1, wherein the control circuit is configured to allow the state of the electronic device to transition from the normal operation state to the first low-power state without executing negotiation with the host. ### Claim 5 (depends on 1) The electronic device according to claim 1, wherein the control circuit is configured to allow the state of the electronic device to transition from the first low-power state to the normal operation state in a case where reception of specific information is detected on the one lane. ### Claim 6 (depends on 5) The electronic device according to claim 5, wherein the specific information includes electrical idle ordered set transmitted from the host. ### Claim 7 (depends on 5) The electronic device according to claim 5, wherein the one lane among the plurality of lanes is a lane to which the lane number 0 is assigned, and the specific information includes a transaction layer packet transmitted from the host. ### Claim 8 (depends on 7) The electronic device according to claim 7, wherein the control circuit is configured to transmit a retransmission request of the transaction layer packet to the host after the state of the electronic device transitions from the first low-power state to the normal operation state. ### Claim 9 (depends on 1) The electronic device according to claim 1, wherein the control circuit is configured to allow the state of the electronic device to transition from the first low-power state to the normal operation state in a case where it is necessary to transmit the transaction layer packet to the host while the state of the electronic device is in the first low-power state. ### Claim 10 (depends on 1) The electronic device according to claim 1, wherein the control circuit is configured to transmit a training sequence to the host via each of the plurality of lanes in a case where it is necessary to transmit a transaction layer packet to the host, or the reception of specific information is detected on the one lane while the state of the electronic device is the first low-power state. ### Claim 11 (depends on 1) The electronic device according to claim 1, wherein the serial interface is a serial interface based on a PCI Express specification. ### Claim 12 A power management method executed by an electronic device which is connectable with a host via a serial interface, the electronic device including a link configured with a plurality of lanes, each of which includes a differential signal wire pair for transmission and a differential signal wire pair for reception, a plurality of transmitter circuits that respectively correspond to the plurality of lanes, and is configured to transmit data via the differential signal wire pair for transmission of each of the corresponding lanes, a plurality of receiver circuits that respectively correspond to the plurality of lanes, and is configured to receive data via the differential signal wire pair for reception of each of the corresponding lanes, and a control circuit, the method comprising: causing a state of the electronic device to transition from a normal operation state in which the plurality of transmitter circuits and the plurality of receiver circuits are in an active state, to a first low-power state in which the plurality of transmitter circuits are maintained in an active state and the plurality of receiver circuits are in an inactive state except for one of the receiver circuits corresponding to one lane among the plurality of lanes; and causing the state of the electronic device to transition from the first low-power state to the normal operation state in a case where reception of specific information is detected on the one lane. ### Claim 13 (depends on 12) The power management method according to claim 12, wherein the one lane among the plurality of lanes is a lane to which lane number 0 is assigned. ### Claim 14 (depends on 12) The power management method according to claim 12, wherein causing the state of the electronic device to transition from the normal operation state to the first low-power state, includes causing the state of the electronic device to transition from the normal operation state to the first low-power state in a case where data to be transmitted to the host does not exist for a first period. ### Claim 15 (depends on 12) The power management method according to claim 12, wherein the specific information includes electrical idle ordered set transmitted from the host. ### Claim 16 (depends on 12) The power management method according to claim 12, wherein the one lane among the plurality of lanes is a lane to which the lane number 0 is assigned, and the specific information includes a transaction layer packet transmitted from the host. ### Claim 17 A storage device which is connectable with a host via a serial interface including a link configured with a plurality of lanes, each of which includes a differential signal wire pair for transmission and a differential signal wire pair for reception, the device comprising: a nonvolatile memory; a controller for the nonvolatile memory; and a host interface circuit including a plurality of transmitter circuits that respectively correspond to the plurality of lanes, and is configured to transmit data via the differential signal wire pair for transmission of each of the corresponding lanes, a plurality of receiver circuits that respectively correspond to the plurality of lanes, and is configured to receive data via the differential signal wire pair for reception of each of the corresponding lanes, and a control circuit configured to allow a state of the storage device to transition from a normal operation state in which the plurality of transmitter circuits and the plurality of receiver circuits are in an active state, to a first low-power state in which the plurality of transmitter circuits are maintained in an active state and the plurality of receiver circuits are in an inactive state except for one of the receiver circuits corresponding to one lane among the plurality of lanes. ### Claim 18 (depends on 17) The storage device according to claim 17, wherein the control circuit is configured to allow the state of the storage device to transition from the normal operation state to the first low-power state, in a case where data to be transmitted to the host does not exist for a first period. ### Claim 19 (depends on 17) The storage device according to claim 17, wherein the control circuit is configured to allow the state of the storage device to transition from the normal operation state to the first low-power state without executing negotiation with the host in a case where the data to be transmitted to the host does not exist during the first period. ### Claim 20 (depends on 17) The electronic device according to claim 17, wherein the control circuit is configured to allow the state of the storage device to transition from the first low-power state to the normal operation state in a case where reception of specific information is detected on the one lane.