# US 10,503,077 B2 · Shadow mask area correction for tunnel junctions

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- Number: US 10,503,077 B2
- Document ID: US10503077B2
- Status: Granted
- Kind: B2
- Application number: 15/805,306
- Filed: 2017-11-07
- Published: 2019-05-09
- Granted: 2019-12-10
- Earliest claimed: 2017-11-07
- Assignees: International Business Machines Corporation
- Applicants: International Business Machines Corporation
- Inventors: Markus Brink; Sami Rosenblatt; Bryan D. Trimm
- Web page: https://patentgrep.com/patent/US10503077B2

## CPC

- G03F 7/70633: {Overlay, i.e. relative alignment between patterns printed by separate exposures in different layers, or in the same layer in multiple exposures or stitching}
- G03F 1/36: Masks having proximity correction features; Preparation thereof, e.g. optical proximity correction [OPC] design processes
- G03F 7/70441: {Optical proximity correction [OPC]}
- H10N 50/01: Manufacture or treatment
- H10N 60/0912: {of Josephson-effect devices}
- G03F: PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR; (phototypographic composing devices B41B; photosensitive materials or processes for photographic purposes G03C; electrophotography, sensitive layers or processes therefor G03G)
- H10N: ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR

## Abstract

A technique relates to correcting an area of overlap between two films created by sequential shadow mask evaporations. At least one process is performed of: correcting design features in an original layout to generate a corrected layout using a software tool, such that the corrected layout modifies shapes of the design features and correcting the design features in the original layout to generate the corrected layout using a lithographic tool, such that the corrected layout modifies the shapes of the design features. The modified shapes of the design features are patterned at locations on a wafer according to the corrected layout using the lithographic tool. A first film is deposited by an initial shadow mask evaporation and a second film by a subsequent shadow mask evaporation to produce corrected junctions at the locations on the wafer, such that the first film and the second film have an overlap.

## Claims

### Claim 1

A method for correcting an area of overlap between two films created by sequential shadow mask evaporations, the method comprising:
performing at least one process selected from a group consisting of:
correcting design features in an original layout to generate a corrected layout using a software tool, such that the corrected layout modifies shapes of the design features; and
correcting the design features in the original layout to generate the corrected layout using a lithographic tool, such that the corrected layout modifies the shapes of the design features;
patterning the modified shapes of the design features at locations on a wafer according to the corrected layout using the lithographic tool, wherein the corrected layout includes a positional tilt correction; and
depositing a first film by an initial shadow mask evaporation and a second film by a subsequent shadow mask evaporation to produce a corrected junction at the locations on the wafer, such that the first film and the second film have an overlap.

### Claim 2 (depends on 1)

The method of claim 1, wherein the overlap between the first film and the second film defines a tunnel junction.

### Claim 3 (depends on 1)

The method of claim 1, wherein the overlap between the first film and the second film defines a Josephson junction.

### Claim 4 (depends on 1)

The method of claim 1, wherein the initial shadow mask evaporation and the subsequent shadow mask evaporation utilize a suspended resist bridge.

### Claim 5 (depends on 1)

The method of claim 1, wherein the initial shadow mask evaporation and the subsequent shadow mask evaporation utilize a crossing without a suspended resist bridge.

### Claim 6 (depends on 1)

The method of claim 1, wherein corrections to the original layout account for narrowing of the design features from previous depositions prior to the subsequent shadow mask evaporation.

### Claim 7 (depends on 1)

The method of claim 1, wherein an oxide layer is between the first film and the second film.

### Claim 8 (depends on 1)

The method of claim 1, wherein the positional tilt correction is configured to modify the shapes of the design features relative to a position of an evaporation source and individual ones of the design features.

### Claim 9 (depends on 1)

The method of claim 1, wherein the corrected layout includes a sidewall deposit correction.

### Claim 10 (depends on 9)

The method of claim 9, wherein the sidewall deposit correction is configured to modify the shapes of the design features relative to a previous sidewall deposit from a previous shadow mask evaporation.

### Claim 11 (depends on 1)

The method of claim 1, wherein the corrected layout includes a sidewall flashing correction.

### Claim 12 (depends on 11)

The method of claim 11, wherein the sidewall flashing correction is configured to modify the shapes of the design features to prevent a width of the first film, the second film, or both the first film and the second film from being reduced by flashing against a sidewall of a resist material.

### Claim 13 (depends on 1)

The method of claim 1, wherein corrections in the corrected layout include at least two types of corrections selected from a group consisting of: the positional tilt correction, a sidewall deposit correction, and a sidewall flashing correction.

### Claim 14

A method of forming junctions, the method comprising:
correcting design features in an original layout to generate a corrected layout;
patterning the design features of the corrected layout at locations on a wafer; and
depositing a first film and a second film using shadow mask evaporation according to the corrected layout, the corrected layout being corrected for deposition by the shadow mask evaporation, wherein the corrected layout includes a positional tilt correction.

### Claim 15 (depends on 14)

The method of claim 14, wherein an overlap between the first film and the second film defines a tunnel junction.

### Claim 16 (depends on 14)

The method of claim 14, wherein an overlap between the first film and the second film defines a Josephson junction.

### Claim 17 (depends on 14)

The method of claim 14, wherein the correcting the design features in the original layout to generate the corrected layout comprises widening shapes of the design features relative to an evaporation source.

### Claim 18 (depends on 14)

The method of claim 14, wherein an oxide layer is between the first film and the second film.

### Claim 19 (depends on 14)

The method of claim 14, wherein the corrected layout includes a sidewall deposit correction.

### Claim 20 (depends on 14)

The method of claim 14, wherein the corrected layout includes a sidewall flashing correction.