# US 10,503,035 B2 · Display device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,503,035 B2 - Document ID: US10503035B2 - Status: Granted - Kind: B2 - Application number: 15/682,106 - Filed: 2017-08-21 - Published: 2018-06-28 - Granted: 2019-12-10 - Earliest claimed: 2016-12-28 - Assignees: LG Display Co., Ltd. - Applicants: LG Display Co., Ltd. - Inventors: Jimin Yeom; ByoungHee Kim; Junguk Kim - Web page: https://patentgrep.com/patent/US10503035B2 ## CPC - G02F 1/136204: {Arrangements to prevent high voltage or static electricity failures} - G02F 1/136286: {Wiring, e.g. gate line, drain line} - H10D 89/921: {characterised by the configuration of the interconnections connecting the protective arrangements, e.g. ESD buses} - H10D 89/931: {characterised by the dispositions of the protective arrangements} - H10D 86/441: {Interconnections, e.g. scanning lines} - H10D 86/60: wherein the TFTs are in active matrices - G02F: OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES ## Abstract The present aspect relates to a liquid crystal display device including an antistatic structure. In the liquid crystal display device including a first electrostatic discharge (ESD) circuit to prevent static electricity generated from the common voltage pattern and a second ESD circuit to prevent static electricity generated from a data line, the first ESD circuit is floated from a common voltage line and is electrically connected to a common voltage jumping pattern which connects the common voltage line with a common electrode, thereby preventing static electricity generated from the common voltage pattern from flowing into the data line. ## Claims ### Claim 1 A liquid crystal display device comprising: a plurality of pixels comprising a pixel electrode, a common electrode and at least one thin film transistor disposed at an intersection of a gate line (GL) and a data line (DL); at least one common voltage line configured to apply a common voltage to the common electrode; a common voltage jumping pattern electrically connecting the at least one common voltage line and the common electrode, wherein the common voltage jumping pattern is disposed in a portion of a non-display area; and a first electrostatic discharge (ESD) circuit having one end electrically connected to the common voltage jumping pattern. ### Claim 2 (depends on 1) The liquid crystal display device of claim 1, further comprising a second ESD circuit having one end electrically connected to the data line and another end electrically connected to one of the at least one common voltage lines. ### Claim 3 (depends on 2) The liquid crystal display device of claim 2, wherein the second ESD circuit prevents a static electricity generated from the data line or a static electricity generated from the data line from flowing into a pixel region. ### Claim 4 (depends on 1) The liquid crystal display device of claim 1, wherein the common voltage jumping pattern comprises a plurality of contact holes to electrically connect a gate metal pattern and a common electrode pattern layer. ### Claim 5 (depends on 4) The liquid crystal display device of claim 4, wherein the gate metal pattern is formed of the same layer as the common voltage line and the common electrode pattern layer is formed of the same layer as the common electrode. ### Claim 6 (depends on 1) The liquid crystal display device of claim 1, wherein the common voltage jumping pattern comprises a first jumping pattern portion electrically connecting a gate metal pattern and a common electrode pattern layer and a second jumping pattern portion electrically connecting a source/drain metal pattern and the common electrode pattern layer. ### Claim 7 (depends on 6) The liquid crystal display device of claim 6, wherein the source/drain metal pattern is formed of the same layer as the data line. ### Claim 8 (depends on 6) The liquid crystal display device of claim 6, wherein the first jumping pattern portion includes a plurality of first contact holes, which allows a gate insulating layer and at least one passivation layer to expose a gate metal layer, and the second jumping pattern portion includes a plurality of second contact holes, which allows the at least one passivation layer to expose a source/drain metal layer. ### Claim 9 (depends on 1) The liquid crystal display device of claim 1, wherein the first ESD circuit has another end electrically connected to one of the at least one common voltage lines. ### Claim 10 (depends on 1) The liquid crystal display device of claim 1, wherein the first ESD circuit comprises a first transistor, a second transistor, and a third transistor, which are connected to each other. ### Claim 11 A liquid crystal display device comprising a plurality of pixels, a pixel electrode, a common electrode and a thin film transistor disposed at an intersection of a gate line and a data line, comprising: first and second common voltage lines configured to apply a common voltage to the common electrode; first and second common voltage jumping patterns electrically connecting the first and second common voltage lines and the common electrode; and first and second electrostatic discharge circuits, the first electrostatic discharge circuit having one end connected to the second common voltage jumping pattern and the other end connected to the second common voltage lines, the second electrostatic discharge circuit having one connected to the data line. ### Claim 12 (depends on 11) The liquid crystal display device of claim 11, further comprising a supplemental first electrostatic discharge circuits electrically connected to the second common voltage jumping pattern, the second common voltage line and a supplemental second common voltage line. ### Claim 13 (depends on 11) The liquid crystal display device of claim 11, wherein the first jumping pattern portion electrically connecting a gate metal pattern and a common electrode pattern layer and the second jumping pattern portion electrically connecting a source/drain metal pattern and the common electrode pattern layer. ### Claim 14 (depends on 13) The liquid crystal display device of claim 13, wherein the gate metal pattern is formed of the same layer as the first and second common voltage lines and the common electrode pattern layer is formed of the same layer as the common electrode. ### Claim 15 (depends on 13) The liquid crystal display device of claim 13, wherein the source/drain metal pattern is formed of the same layer as the data line. ### Claim 16 (depends on 11) The liquid crystal display device of claim 11, wherein the first jumping pattern portion includes a plurality of first contact holes allowing a gate insulating layer and at least one passivation layer to expose a gate metal layer, and the second jumping pattern portion includes a plurality of second contact holes allowing the at least one passivation layer to expose a source/drain metal layer. ### Claim 17 (depends on 11) The liquid crystal display device of claim 11, wherein the second electrostatic discharge circuit prevents a static electricity generated from the data line or a static electricity generated from the data line from flowing into a pixel region. ### Claim 18 (depends on 11) The liquid crystal display device of claim 11, wherein first and second common voltage jumping patterns comprises a dual metal-layer structure. ### Claim 19 (depends on 11) The liquid crystal display device of claim 11, wherein both ends of the first electrostatic discharge circuit are equipotential and both ends of the second electrostatic discharge circuit has a different potential. ### Claim 20 (depends on 11) The liquid crystal display device of claim 11, wherein the first electrostatic discharge circuit prevents a static electricity generated from the first and second common voltage jumping patterns.