# US 10,485,097 B2 · Backplane footprint for high speed, high density electrical connectors

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- Number: US 10,485,097 B2
- Document ID: US10485097B2
- Status: Granted
- Kind: B2
- Application number: 16/214,298
- Filed: 2018-12-10
- Published: 2019-04-11
- Granted: 2019-11-19
- Earliest claimed: 2016-03-08
- Assignees: Amphenol Corporation
- Applicants: Amphenol Corporation
- Inventors: Marc Robert Charbonneau; Jose Ricardo Paniagua
- Web page: https://patentgrep.com/patent/US10485097B2

## CPC

- H05K 1/0245: {Lay-out of balanced signal pairs, e.g. differential lines or twisted lines}
- H01R 12/7082: {Coupling device supported only by cooperation with PCB}
- H01R 12/716: {Coupling device provided on the PCB}
- H05K 1/0219: {Printed shielding conductors for shielding around or between signal conductors, e.g. coplanar or coaxial printed shielding conductors}
- H05K 1/0251: {related to vias or transitions between vias and transmission lines}
- H05K 1/115: {Via connections; Lands around holes or via connections (H05K1/112 takes precedence)}
- H05K 3/429: {Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers}
- H05K 1/0225: {Single or multiple openings in a shielding, ground or power plane (H05K1/0227 takes precedence)}
- H05K 2201/096: Vertically aligned vias, holes or stacked vias
- H05K 2201/09727: Varying width along a single conductor; Conductors or pads having different widths
- H05K 2201/09845: Stepped hole, via, edge, bump or conductor
- H05K: PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H01R: ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS

## Abstract

A printed circuit board includes a plurality of layers including attachment layers and routing layers; and columns of via patterns formed in the plurality of layers, wherein via patterns in adjacent columns are offset in a direction of the columns, each of the via patterns comprising: first and second signal vias forming a differential signal pair, the first and second signal vias extending through at least the attachment layers; and at least one conductive shadow via located between the first and second signal vias of the differential pair. In some embodiments, at least one conductive shadow via is electrically connected to a conductive surface film.

## Claims

### Claim 1

A printed circuit board comprising:
a plurality of layers including attachment layers and routing layers; and
columns of via patterns formed in the plurality of layers, wherein via patterns in adjacent columns are offset in a direction of the columns, each of the via patterns comprising:
first and second signal vias forming a differential signal pair, the first and second signal vias extending through the attachment layers to at least one breakout layer of the routing layers;
at least one antipad surrounding the first and second signal vias; and
first and second conductive shadow vias located between the first and second signal vias of the differential pair on a first line that is perpendicular to a second line through the first and second signal vias and that is midway between the first and second signal vias.

### Claim 2 (depends on 1)

The printed circuit board as defined in claim 1, wherein the first and second shadow vias are smaller in diameter than the first and second signal vias.

### Claim 3 (depends on 1)

The printed circuit board as defined in claim 1, further comprising additional shadow vias located between adjacent via patterns in each of the columns.

### Claim 4 (depends on 1)

The printed circuit board as defined in claim 1, wherein the first and second shadow vias contact opposite sides of the antipad and divide the antipad into first and second sections surrounding the first and second signal vias, respectively.

### Claim 5 (depends on 1)

The printed circuit board as defined in claim 1, wherein each of the first and second shadow vias is equally spaced from the first and second signal vias.

### Claim 6 (depends on 1)

The printed circuit board as defined in claim 1, wherein the at least one antipad comprises a first antipad surrounding the first signal via and a second antipad surrounding the second signal via and wherein first and second signal traces are connected to the first and second signal vias, respectively, in a breakout layer of the routing layers and wherein the first and second antipads in a layer below the breakout layer include ground plane projections toward the first and second signal vias underneath the first and second signal traces.

### Claim 7 (depends on 6)

The printed circuit board as defined in claim 6, wherein each of the first and second signal traces includes a widened portion near the respective first and second signal vias.
