# US 10,485,095 B2 · Printed circuit board design for high speed application

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- Number: US 10,485,095 B2
- Document ID: US10485095B2
- Status: Granted
- Kind: B2
- Application number: 15/877,396
- Filed: 2018-01-23
- Published: 2018-05-24
- Granted: 2019-11-19
- Earliest claimed: 2011-03-10
- Assignees: Mediatek Inc.
- Applicants: Mediatek Inc.
- Inventors: Nan-Jang Chen
- Web page: https://patentgrep.com/patent/US10485095B2

## CPC

- H05K 1/0219: {Printed shielding conductors for shielding around or between signal conductors, e.g. coplanar or coaxial printed shielding conductors}
- H01P 3/08: Microstrips; Strip lines
- H05K 1/0224: {Patterned shielding planes, ground planes or power planes (H05K1/0253 takes precedence)}
- H05K 1/0227: {Split or nearly split shielding or ground planes}
- H05K 1/05: Insulated {conductive substrates, e.g. insulated} metal substrate
- H05K 1/0218: {by printed shielding conductors, ground planes or power plane (H05K1/0236 takes precedence)}
- H05K 1/0298: {Multilayer circuits}
- H05K 1/11: Printed elements for providing electric connections to or between printed circuits
- H05K 1/18: structurally associated with non-printed electric components (H05K1/16 takes precedence)
- H05K: PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H01P: WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE (operating at optical frequencies G02B)

## Abstract

A printed circuit board (PCB) is disclosed. The PCB includes a substrate have a top surface and a bottom surface. A first conductive layer is disposed on the top surface of the substrate. The first conductive layer comprises a first signal net and a second signal net. An outermost insulating layer is disposed on the top surface of the substrate to cover the substrate and the first conductive layer. The outmost insulating layer comprises an opening to expose a portion of the second signal net. A second conductive layer is disposed on the outermost insulating layer and substantially covering at least a portion of the first signal net. The second conductive layer is filled into the opening to electrically connect to the second signal net which is able to provide one of a ground potential and a power potential.

## Claims

### Claim 1

A printed circuit board, comprising:
a substrate having a top surface and a bottom surface;
a first signal net and a second signal net being in close proximity to each other and disposed within a specific region on the top surface of the substrate;
an outermost insulating layer disposed on the top surface of the substrate to cover the substrate, the first signal net and the second signal net, wherein the outmost insulating layer comprises a plurality of openings which expose at least a top portion of the second signal net from the outmost insulating layer, the openings arranged along a lengthwise direction of the second signal net with a first pitch, wherein the first pitch is equal to or smaller than 20 mm;
a reference plane disposed underneath the bottom surface of the substrate and underlying the first signal net and the second signal net, wherein the reference plane is electrically connected to the second signal net through a plurality of via holes formed underneath a bottom portion of the second signal net and disposed in the substrate, the via holes arranged along the lengthwise direction of the second signal net with a second pitch, wherein the second pitch is equal to or smaller than 20 mm; and
a conductive layer disposed in the openings to electrically connect to the second signal net, and the conductive layer further disposed on the outermost insulating layer corresponding to the specific region in which the first signal net is arranged such that the conductive layer overlaps with the first signal net,
wherein positions of the via holes underneath the second signal net interleave with positions of the openings on top of the second signal net along the lengthwise direction of the second signal net.

### Claim 2 (depends on 1)

The printed circuit board according to claim 1, wherein each of the plurality of via holes is a completely-filled via hole.

### Claim 3 (depends on 1)

The printed circuit board according to claim 1, wherein each of the via holes has a diameter that is greater than or equal to 0.1 mm.

### Claim 4 (depends on 3)

The printed circuit board according to claim 3, wherein a via land pad is formed on each of the via hole, and wherein the via land pad has a diameter that is greater than or equal to 0.2 mm.

### Claim 5 (depends on 1)

The printed circuit board according to claim 1, wherein each of the openings covers an area that is greater than or equal to 0.008 mm2.