# US 10,484,231 B2 · Routing-over-void-T-line-compensation > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,484,231 B2 - Document ID: US10484231B2 - Status: Granted - Kind: B2 - Application number: 16/021,292 - Filed: 2018-06-28 - Published: 2019-01-03 - Granted: 2019-11-19 - Earliest claimed: 2017-06-30 - Assignees: Intel Corporation - Applicants: Intel Corporation - Inventors: Khang Choong Yong; Bok Eng Cheah; Jackson Chung Peng Kong; Stephen Harvey Hall; Yun Rou Lim - Web page: https://patentgrep.com/patent/US10484231B2 ## CPC - H05K 1/025: {Impedance arrangements, e.g. impedance matching, reduction of parasitic impedance (H05K1/024 and H05K1/0243 take precedence; for semiconductor devices H10W44/20)} - H01R 13/6658: {on printed circuit board (H01R13/6666 - H01R13/6691 take precedence)} - H01R 13/6691: {with built-in signalling means (H01R13/717 takes precedence)} - H05K 1/0251: {related to vias or transitions between vias and transmission lines} - H05K 2201/09345: Power and ground in the same plane; Power planes for two voltages in one plane - H05K 2201/09727: Varying width along a single conductor; Conductors or pads having different widths - H05K: PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS - H01R: ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS ## Abstract Apparatus and methods are provided for ameliorating distortion issues associated with a conductor that passes over a void in a reference plane. In an example, the signal conductor can include a first part routed over the major surface of a first side of the reference plane structure on a first side of the void and that approaches a first edge of the reference plane structure with a first trajectory, a second part routed over the major surface of the reference plane structure on a second side of the void and that approaches a second edge of the reference plane structure with a second trajectory, and a third portion connecting the first portion with the second portion, the third portion spanning the void, and having a plurality of spurs extending from a body of the third portion. ## Claims ### Claim 1 An apparatus comprising: a reference plane structure; a void between two edges of the reference plane structure; a first signal conductor routed over a major surface of the reference plane structure and spanning the void; wherein the first signal conductor includes: a first portion routed over the major surface of a first side of the void and that approaches a first edge of the reference plane structure with a first trajectory; a second portion routed over the major surface of a second side of the void and that approaches a second edge of the reference plane structure with a second trajectory in-line with the first trajectory; and a third portion connecting the first portion with the second portion and having a plurality of spurs extending from a body of the third portion. ### Claim 2 (depends on 1) The apparatus of claim 1, wherein a length of the third portion in the general direction of signal flow via the first signal conductor is consummate with a distance across the void between the first edge and the second edge, the distance across the void measured at first edge where the first portion approaches the first edge and at the second edge where the second portion approaches the second edge. ### Claim 3 (depends on 1) The apparatus of claim 1, wherein a first spur of the plurality of spurs extends from the body of the third portion. ### Claim 4 (depends on 3) The apparatus of claim 3, wherein a second spur of the plurality of spurs extends from the body of the third portion opposite the first spur to form a first spur pair. ### Claim 5 (depends on 4) The apparatus of claim 4, wherein the first spur pair is one of a plurality of spur pairs and wherein the plurality of spur pairs include the plurality of spurs. ### Claim 6 (depends on 1) The apparatus of claim 1, wherein a first spur of the plurality of spurs extends perpendicular from the body of the third portion. ### Claim 7 (depends on 1) The apparatus of claim 1, wherein the reference plane is a singular structure and the void is part of an opening within the singular structure. ### Claim 8 (depends on 1) The apparatus of claim 1, including a dielectric configured to separate the first signal conductor from the reference plane structure. ### Claim 9 (depends on 1) The apparatus of claim 1, wherein the reference plane structure includes: a first reference plane including the first edge and configured to be at a first reference potential; and a second reference plane including the second edge and configured to be at a second reference potential different from the first reference potential. ### Claim 10 (depends on 1) The apparatus of claim 1, wherein the first trajectory is perpendicular to the first edge and the second edge. ### Claim 11 (depends on 1) The apparatus of claim 1, including a second signal conductor routed over a major surface of the reference plane structure and spanning the void. ### Claim 12 (depends on 11) The apparatus of claim 11, wherein the second signal conductor includes: a first portion routed over the major surface of a first side of the void and that approaches a first edge of the reference plane structure with a first trajectory; a second portion routed over the major surface of a second side of the void and that approaches a second edge of the reference plane structure with a second trajectory in-line with the first trajectory; and a third portion connecting the first portion with the second portion and having a plurality of spurs extending from a body of the third portion. ### Claim 13 (depends on 12) The apparatus of claim 12, wherein one of the plurality of spurs of the third portion of the second signal conductor is interleaved with one of the plurality of spurs of the third portion of the first signal conductor. ### Claim 14 (depends on 12) The apparatus of claim 12, wherein the plurality of spurs of the third portion of the second signal conductor is interleaved with the plurality of spurs of the third portion of the first signal conductor. ### Claim 15 (depends on 12) The apparatus of claim 12, wherein a first spur of the plurality of spurs of the second signal conductor extends from a body of the third portion of the second signal conductor; wherein a second spur of the plurality of spurs of the second signal conductor extends from the body of the third portion opposite the first spur of the second signal conductor to form a first spur pair of the second signal conductor; wherein the first spur pair of the second signal conductor is one of a second plurality of spur pairs and wherein the second plurality of spur pairs include the plurality of spurs of the second signal conductor; wherein each spur pair of the second plurality of spur pairs is equidistant from each immediately adjacent spur pair of the second plurality of spur pairs. ### Claim 16 A system comprising: a substrate including a reference plane structure; a first integrated circuit chip mounted to the substrate; a second integrated circuit chip; and a signal conductor mounted to the substrate, the signal conductor configured to couple between the first chip and the second chip and to span a void in the reference plane structure, the signal conductor comprising: a first portion routed over a major surface of a first side of the void and that approaches a first edge of the reference plane structure with a first trajectory; a second portion routed over a major surface of a second side of the void and that approaches a second edge of the reference plane structure with a second trajectory; and a third portion connecting the first portion with the second portion and having a plurality of spurs extending from a body of the third portion. ### Claim 17 (depends on 16) The system of claim 16, wherein the substrate is a printed circuit board. ### Claim 18 (depends on 16) The system of claim 16, wherein the substrate is one of a plurality of substrates of an integrated circuit package. ### Claim 19 (depends on 18) The system of claim 18, wherein the first integrated circuit is a processor; and wherein the second integrated circuit is wireless communication controller. ### Claim 20 (depends on 19) The system of claim 19, including an operator interface configured to control functions provided by the processor and the wireless controller and to display status indications of the processor and the wireless communication controller.