# US 10,484,224 B2 · Peak-to-average power reduction using guard tone filtering

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- Number: US 10,484,224 B2
- Document ID: US10484224B2
- Status: Granted
- Kind: B2
- Application number: 15/942,614
- Filed: 2018-04-02
- Published: 2018-08-09
- Granted: 2019-11-19
- Earliest claimed: 2017-02-07
- Assignees: Texas Instruments Incorporated
- Applicants: Texas Instruments Incorporated
- Inventors: Jaiganesh Balakrishnan; Sarma Sundareswara Gunturi; Pankaj Gupta; Indu Prathapan
- Web page: https://patentgrep.com/patent/US10484224B2

## CPC

- H04L 27/2624: {by soft clipping}
- H04L: TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION (arrangements common to telegraphic and telephonic communication H04M)

## Abstract

The disclosure provides a circuit. The circuit includes an IFFT (inverse fast fourier transform) block. The IFFT block generates a modulated signal in response to a data signal. A clip logic block is coupled to the IFFT block, and generates a clipped signal in response to the modulated signal. A first subtractor is coupled to the clip logic block and the IFFT block, and subtracts the modulated signal from the clipped signal to generate an error signal. A cyclic filter is coupled to the first subtractor, and filters the error signal to generate a filtered error signal. A second subtractor is coupled to the cyclic filter and the IFFT block. The second subtractor subtracts the filtered error signal from the modulated signal to generate a processed signal.

## Claims

### Claim 1

A circuit comprising:
an IFFT (inverse fast fourier transform) block configured to generate a modulated signal in response to a data signal;
a clip logic block coupled to the IFFT block, and configured to generate a clipped signal in response to the modulated signal; and
a second subtractor coupled to the IFFT block and configured to generate a processed signal in response to the modulated signal and the clipped signal, a peak-to-average power ratio (PAR) of the processed signal is less than a PAR of the data signal.

### Claim 2 (depends on 1)

The circuit of claim 1 further comprising:
a first subtractor coupled to the clip logic block and the IFFT block, and configured to subtract the modulated signal from the clipped signal to generate an error signal; and
a cyclic filter coupled to the first subtractor, and configured to filter the error signal to generate a filtered error signal, wherein the filtered error signal is subtracted from the modulated signal by the second subtractor to generate the processed signal.

### Claim 3 (depends on 1)

The circuit of claim 1, wherein the data signal is an OFDM (orthogonal frequency division multiplexed) signal, the OFDM signal further comprising data tone sub-carriers and guard tone sub-carriers.

### Claim 4 (depends on 3)

The circuit of claim 3, wherein the data tone sub-carriers determine a stop-band of the cyclic filter, and the guard tone sub-carriers determine a pass-band of the cyclic filter.

### Claim 5 (depends on 1)

The circuit of claim 1, wherein the clip logic block is configured to clip the modulated signal at a threshold level to generate the clipped signal.

### Claim 6 (depends on 2)

The circuit of claim 2, wherein the cyclic filter is a tap delay line, and configured to perform cyclic convolution of the error signal and filter coefficients associated with the cyclic filter.

### Claim 7 (depends on 2)

The circuit of claim 2, wherein the cyclic filter is a band-stop filter in EVM (error vector magnitude) limited mode, and the cyclic filter is a band-pass filter in mask limited mode.

### Claim 8 (depends on 2)

The circuit of claim 2, wherein the error signal is provided to the cyclic filter without reordering the error signal in a buffer.

### Claim 9

A method comprising:
performing inverse fast fourier transform (IFFT) on a data signal to generate a modulated signal;
clipping the modulated signal to generate a clipped signal; and
generating a processed signal from the modulated signal and the clipped signal, a peak-to-average power ratio (PAR) of the processed signal is less than a PAR of the data signal.

### Claim 10 (depends on 9)

The method of claim 9, wherein generating the processed signal further comprises:
subtracting the modulated signal from the clipped signal to generate an error signal;
filtering the error signal in a cyclic filter to generate a filtered error signal; and
subtracting the filtered error signal from the modulated signal.

### Claim 11 (depends on 9)

The method of claim 9, wherein the data signal is an OFDM (orthogonal frequency division multiplexed) signal, the OFDM signal further comprising data tone sub-carriers and guard tone sub-carriers.

### Claim 12 (depends on 10)

The method of claim 10 further comprising determining a stop-band of the cyclic filter from the data tone sub-carriers, and determining a pass-band of the cyclic filter from the guard tone sub-carriers.

### Claim 13 (depends on 9)

The method of claim 9, wherein clipping the modulated signal further comprises clipping at a threshold level to generate the clipped signal.

### Claim 14 (depends on 10)

The method of claim 10, wherein filtering the error signal further comprises performing cyclic convolution of the error signal and filter coefficients associated with the cyclic filter.

### Claim 15 (depends on 10)

The method of claim 10 further comprising providing the error signal to the cyclic filter without reordering the error signal in a buffer.

### Claim 16

A computing device comprising:
a processing unit;
a memory module coupled to the processing unit; and
a transceiver coupled to the processing unit and the memory module, the transceiver includes a circuit, the circuit further comprising:
an IFFT (inverse fast fourier transform) block configured to generate a modulated signal in response to a data signal;
a clip logic block coupled to the IFFT block, and configured to generate a clipped signal in response to the modulated signal; and
a second subtractor coupled to the IFFT block and configured to generate a processed signal in response to the modulated signal and the clipped signal, a peak-to-average power ratio (PAR) of the processed signal is less than a PAR of the data signal.

### Claim 17 (depends on 16)

The computing device of claim 16 further comprising:
a first subtractor coupled to the clip logic block and the IFFT block, and configured to subtract the modulated signal from the clipped signal to generate an error signal; and
a cyclic filter coupled to the first subtractor, and configured to filter the error signal to generate a filtered error signal, wherein the filtered error signal is subtracted from the modulated signal by the second subtractor to generate the processed signal.

### Claim 18 (depends on 16)

The computing device of claim 16, wherein the data signal is an OFDM (orthogonal frequency division multiplexed) signal, the OFDM signal further comprising data tone sub-carriers and guard tone sub-carriers.

### Claim 19 (depends on 18)

The computing device of claim 18, wherein the data tone sub-carriers determine a stop-band of the cyclic filter, and the guard tone sub-carriers determine a pass-band of the cyclic filter.

### Claim 20 (depends on 17)

The computing device of claim 17, wherein the error signal is provided to the cyclic filter without reordering the error signal in a buffer.