# US 10,484,136 B2 · High speed interleaver/deinterleaver device supporting line rate, and method thereof

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- Number: US 10,484,136 B2
- Document ID: US10484136B2
- Status: Granted
- Kind: B2
- Application number: 15/615,358
- Filed: 2017-06-06
- Published: 2018-12-06
- Granted: 2019-11-19
- Earliest claimed: 2017-06-06
- Assignees: Hughes Network Systems, LLC
- Applicants: Sri Bhat; Bala Subramaniam; Yanlai Liu
- Inventors: Sri Bhat; Bala Subramaniam; Yanlai Liu
- Web page: https://patentgrep.com/patent/US10484136B2

## CPC

- H04L 1/0071: {Use of interleaving (interleaving per se H03M13/27)}
- G06F 12/0607: {Interleaved addressing}
- G11C 7/1042: {using interleaving techniques, i.e. read-write of one part of the memory while preparing another part}
- G11C 7/18: Bit line organisation; Bit line lay-out
- H03M 13/2707: {Simple row-column interleaver, i.e. pure block interleaving}
- H03M 13/2778: {Interleaver using block-wise interleaving, e.g. the interleaving matrix is sub-divided into sub-matrices and the permutation is performed in blocks of sub-matrices}
- H03M 13/2789: {Interleaver providing variable interleaving, e.g. variable block sizes}
- H03M 13/2792: {Interleaver wherein interleaving is performed jointly with another technique such as puncturing, multiplexing or routing}
- H03M 13/6508: {Flexibility, adaptability, parametrability and configurability of the implementation}
- H03M 13/2957: {Turbo codes and decoding}
- H03M 13/6325: {Error control coding in combination with demodulation}
- H04L 27/20: Modulator circuits; Transmitter circuits
- H04L: TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION (arrangements common to telegraphic and telephonic communication H04M)
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- G11C: STATIC STORES (semiconductor memory devices H10B)
- H03M: CODING; DECODING; CODE CONVERSION IN GENERAL (using fluidic means F15C4/00; optical analogue/digital converters G02F7/00; coding, decoding or code conversion, specially adapted for particular applications, see the relevant subclasses, e.g. G01D, G01R, G06F, G06T, G09G, G10L, G11B, G11C, H04B, H04L, H04M, H04N; ciphering or deciphering for cryptography or other purposes involving the need for secrecy G09C)

## Abstract

A deinterleaver device, a method for deinterleaving, an interleaver device, and a method for interleaving are provided. The method for deinterleaving includes: providing a memory and a stream count for a frame; virtually dividing the memory into equal sections, wherein a section count equals the stream count; calculating a write address for a sample of the samples based on a location of the sample in the frame and a correspondence of the location to one of the sections; receiving the sample; and writing the received sample to the write address, wherein the calculating and the write address corresponds to a correct deinterleaving location in one of the sections for the sample.

## Claims

### Claim 1

A method for deinterleaving samples for a frame, the method comprising:
providing a memory and a stream count selected from n-different supported stream counts;
virtually dividing the memory into x-rows, y-columns and the y-columns into equal sections, wherein a section count equals the stream count, x is at least a frame length divided by v and y is calculated as a common denominator of a majority of the n-different supported stream counts;
calculating, for a sample of the samples, a write address comprising a row and stream count number of columns in the row based on a location of the sample in the frame, wherein the sample comprises stream count soft decisions;
receiving the sample; and
writing the sample to the memory,
wherein each soft decision of the sample is written row-wise to a respective column of the row and the memory is less than or equal to the frame length.

### Claim 2 (depends on 1)

The method of claim 1, wherein the calculating of the write address, the receiving of the sample, and the writing of the received sample are performed at a rate equal to an incoming sample rate.

### Claim 3 (depends on 1)

The method of claim 1, wherein the writing comprises writing the stream count of soft decisions in one clock tick.

### Claim 4 (depends on 1)

The method of claim 1, further comprising deinterleaving a frame by reading, from one of the sections of the memory, the sample based on a read index and the stream count.

### Claim 5 (depends on 1)

The method of claim 1, wherein the frame length of samples in the frame is variable.

### Claim 6 (depends on 1)

The method of claim 1, wherein the stream count is based on a modulation type of the frame and the stream count scales with the modulation type.

### Claim 7 (depends on 1)

The method of claim 1, wherein the frame comprises 64,800 samples, each soft decision of the samples is 6-bits, the frame is modulated using a modulation type having eight or fewer streams, the memory is divided into 540-rows and 120-columns, and the 120-columns are subdivided into the sections.

### Claim 8

A deinterleaver device to deinterleave a frame comprising samples, the device comprising:
a memory;
a memory initializer to virtually divide the memory into equal sections, wherein a section count equals a stream count selected from n-different supported stream counts, virtually dividing the memory into x-rows, y-columns and the y-columns into equal sections, a section count equals the stream count, x is at least the frame length divided by y and y is calculated as a common denominator of a majority of the n-different supported stream counts;
an address calculator to calculate, for a sample of the samples, a write address comprising a row and stream count number of columns in the row based on a location of the sample in the frame, wherein the sample comprises stream count soft decisions; and
a deinterleaver to receive the sample from the frame, and to write the sample to the memory,
wherein each soft decision of the sample is written row-wise to a respective column of the row.

### Claim 9 (depends on 8)

The deinterleaver device of claim 8, wherein the address calculator calculates the write address, the deinterleaver reads the sample, and the deinterleaver writes the received sample at a rate equal to an incoming sample rate.

### Claim 10 (depends on 8)

The deinterleaver device of claim 8, wherein the deinterleaver writes the stream count of received soft decisions in one clock tick.

### Claim 11 (depends on 8)

The deinterleaver device of claim 8, further comprising a reader to read, from one of the sections of the memory, the sample based on a read index and the stream count.

### Claim 12 (depends on 8)

The deinterleaver device of claim 8, wherein a frame length of samples in the frame is variable.

### Claim 13 (depends on 8)

The deinterleaver device of claim 8, wherein the frame comprises 64,800 samples, each soft decision of the samples is 6-bits, the frame is modulated using a modulation type having eight or fewer streams, the memory is divided into 540-rows and 120-columns, and the 120-columns are subdivided into the sections.

### Claim 14 (depends on 8)

The deinterleaver device of claim 8, wherein the memory comprises single-port Random Access Memory (RAM) and the memory is less than or equal to the frame length.