# US 10,484,009 B2 · Decoding method and decoder for low-density parity-check code

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- Number: US 10,484,009 B2
- Document ID: US10484009B2
- Status: Granted
- Kind: B2
- Application number: 15/982,503
- Filed: 2018-05-17
- Published: 2018-09-20
- Granted: 2019-11-19
- Earliest claimed: 2015-11-17
- Assignees: Huawei Technologies Co., Ltd.
- Applicants: Huawei Technologies Co., Ltd.
- Inventors: Jiaqi Fan; Xiaoshu Si
- Web page: https://patentgrep.com/patent/US10484009B2

## CPC

- H03M 13/112: {with correction functions for the min-sum rule, e.g. using an offset or a scaling factor}
- H03M 13/1137: {Partly parallel processing, i.e. sub-blocks or sub-groups of nodes being processed in parallel}
- H03M 13/116: {Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices}
- H03M 13/6508: {Flexibility, adaptability, parametrability and configurability of the implementation}
- H04L 1/00: Arrangements for detecting or preventing errors in the information received {(correcting synchronisation H04L7/00)}
- H03M 13/1117: {using approximations for check node processing, e.g. an outgoing message is depending on the signs and the minimum over the magnitudes of all incoming messages according to the min-sum rule}
- H03M: CODING; DECODING; CODE CONVERSION IN GENERAL (using fluidic means F15C4/00; optical analogue/digital converters G02F7/00; coding, decoding or code conversion, specially adapted for particular applications, see the relevant subclasses, e.g. G01D, G01R, G06F, G06T, G09G, G10L, G11B, G11C, H04B, H04L, H04M, H04N; ciphering or deciphering for cryptography or other purposes involving the need for secrecy G09C)
- H04L: TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION (arrangements common to telegraphic and telephonic communication H04M)

## Abstract

A decoding method and a decoder for a low-density parity-check (LDPC) code, where the method includes dividing, by a decoder, an LDPC code C whose bit length is n into k LDPC codes D={D1,D2,K,Dk-1,Dk}, arranging, by the decoder, Di, i=1,2,K,k−1,k by column to obtain transpose codes DT={D1T,D2T,K,Dk-1T,DkT} of the LDPC codes D, performing cyclic shift on DiT,i=1,2,K,k−1,k by row according to values of corresponding elements in a target check matrix to obtain shift codes E={E1,E2,K,Et-1,Et}, where t is equal to a quantity of rows of the target check matrix, obtaining, by the decoder, t*m groups of LDPC subcodes F1,F2,K,Ftm-1,Ftm according to the shift codes E and a bit length d of the decoder, where Ej is divided into m groups, Ej={(Ej)1d,(Ej)d+12d,K,(Ej)(m-2)d+1(m-1)d,(Ej)(m-1)d+1md}={F(j-1)m+1,F(j-1)m+2,K,Fjm-1,Fjm}, and m=┌l/d┐, and decoding, by the decoder, the m groups of LDPC subcodes to obtain a decoding result of the LDPC code C.

## Claims

### Claim 1

A decoding method for a low-density parity-check (LDPC) code, comprising:
dividing, by a decoder, an LDPC code C whose bit length is n into k divided LDPC codes D, the LDPC code C={c1,c2,c3,K,cn-1,cn}, the divided LDPC codes D={D1,D2,K,Dk-1,Dk}, Di={c(i-1)l+1,c(i-1)l+2,K,cil-1,cil}i=1,2,K,k−1,k, and a bit length of the Di comprising l=n/k;
arranging, by the decoder, the Di,i=1,2,K,k−1,k by column to obtain transpose codes (DT) of the divided LDPC codes D, the DT={D1T,D2T,K,Dk-1T,DkT}, DiT={c(i-1)l+1,c(i-1)l+2,K,cil-1,cil}T, and i=1,2,K,k−1,k;
performing, by the decoder, cyclic shift on the DiT,i=1,2,K,k−1,k by row according to values of corresponding elements in a target check matrix to obtain shift codes (E), the E={E1,E2,K,Et-1,Et}, t being equal to a quantity of rows of the target check matrix, Ej comprising a result of shifting the DT according to an element of a jth row in the target check matrix, and j=1,2,K,t−1,t;
obtaining, by the decoder, t*m groups of LDPC subcodes according to the E and a bit length of the decoder (d), the LDPC subcodes comprising F1,F2,K,Ftm-1,Ftm, the Ej being divided into m groups, the Ej={(Ej)1d,(Ej)d+12d,K,(Ej)(m-2)d+1(m-1)d,(Ej)(m-1)d+1md}={F(j-1)m+1,F(j-1)m+2,K,Fjm-1,Fjm}, (Ej)(s-1)d+1sd, s=1,2,K, m−1,m denoting an [(s−1)d+1]th row to an (sd)th row of the Ej, and m=┌l/d┐; and
decoding, by the decoder, m groups of the LDPC subcodes to obtain a decoding result of the LDPC code C such that a quantity of parallel decoding operations on the LDPC code C being controlled flexibly.

### Claim 2 (depends on 1)

The method of claim 1, wherein decoding the m groups of the LDPC subcodes to obtain the decoding result of the LDPC code C comprises:
obtaining, by the decoder, log likelihood ratio (LLR) values corresponding to the LDPC subcodes, the LLR values corresponding to the LDPC subcodes comprising G1,G2,K,Gtm-1,Gtm;
updating, by the decoder, check nodes according to the LLR values in an order of r=1,2,K,tm−1,tm to obtain a row-updated matrix;
updating, by the decoder, variable nodes column by column according to the row-updated matrix to obtain a column-updated matrix; and
performing, by the decoder, decision and checking on the column-updated matrix to obtain the decoding result of the LDPC code C.

### Claim 3 (depends on 1)

The method of claim 1, wherein the LDPC code C comprises a quasi-cyclic LDPC (QC-LDPC) code, and the l comprising an inflation factor of the QC-LDPC code.

### Claim 4 (depends on 1)

The method of claim 1, wherein the d comprises sixty.

### Claim 5 (depends on 1)

The method of claim 1, wherein decoding the m groups of the LDPC subcodes to obtain the decoding result of the LDPC code C comprises decoding, by the decoder, the m groups of the LDPC subcodes using a minimum sum (Min-sum) decoding algorithm to obtain the decoding result of the LDPC code C.

### Claim 6 (depends on 1)

The method of claim 1, wherein the d comprises one hundred eighty.

### Claim 7

A decoder for a low-density parity-check (LDPC) code, comprising:
a memory comprising instructions; and
a processor coupled to the memory, the instructions causing the processor to be configured to:
divide an LDPC code C whose bit length is n into k divided LDPC codes D, the LDPC code C={c1,c2,c3,K,cn-1,cn}, the divided LDPC codes D={D1,D2,K,Dk-1,Dk}, Di={c(i-1)l+1,c(i-1)l+2,K,cil-1,cil}, i=1,2,K,k−1,k, and a bit length of the Di comprising l=n/k;
arrange the Di,i=1,2,K,k−1,k by column to obtain transpose codes (DT) of the divided LDPC codes D, the DT={D1T,D2T,K,Dk-1T,DkT}, DiT={c(i-1)l+1,c(i-1)l+2,K, cil-1, cil}T, and i=1,2,K,k−1,k;
perform cyclic shift on the DiT,i=1,2,K,k−1,k by row according to values of corresponding elements in a target check matrix to obtain shift codes (E), the E={E1,E2,K,Et-1, Et}, t being equal to a quantity of rows of the target check matrix, and Ej comprising a result of shifting the DT according to an element of a jth row in the target check matrix, and j=1,2,K,t−1,t;
obtain t*m groups of LDPC subcodes according to the E and a bit length of the decoder (d), the Ej being divided into m groups, the Ej={(Ej)1d,(Ej)d+12d,K,(Ej)(m-2)d+1(m-1)d,(Ej)(m-1)d+1md}={F(j-1)m+1,F(j-1)m+2,K,Fjm-1,Fjm}, (Ej)(s-1)d+1sd, s=1,2,K, m−1,m denoting an [(s−1)d+1]th row to an (sd)th row of the Ej, and m=┌l/d┐; and
decode m groups of the LDPC subcodes to obtain a decoding result of the LDPC code C such that a quantity of parallel decoding operations on the LDPC code C being controlled flexibly.

### Claim 8 (depends on 7)

The decoder of claim 7, wherein the instructions further cause the processor to be configured to:
obtain log likelihood ratio (LLR) values corresponding to the LDPC subcodes, the LLR values corresponding to the LDPC subcodes comprising G1,G2,K,Gtm-1,Gtm;
update check nodes according to the LLR values in an order of r=1,2,K,tm−1,tm to obtain a row-updated matrix;
update variable nodes column by column according to the row-updated matrix to obtain a column-updated matrix; and
perform decision and checking on the column-updated matrix to obtain the decoding result of the LDPC code C.

### Claim 9 (depends on 7)

The decoder of claim 7, wherein the LDPC code C comprises a quasi-cyclic LDPC (QC-LDPC) code, and the l comprising an inflation factor of the QC-LDPC code.

### Claim 10 (depends on 7)

The decoder of claim 7, wherein the d comprises sixty.

### Claim 11 (depends on 7)

The decoder of claim 7, wherein the instructions further cause the processor to be configured to decode the m groups of the LDPC subcodes using a minimum sum (Min-sum) decoding algorithm to obtain the decoding result of the LDPC code C.

### Claim 12 (depends on 7)

The decoder of claim 7, wherein the d comprises one hundred eighty.

### Claim 13

A computer program product comprising a non-transitory computer readable storage medium storing program code thereon for decoding a low-density parity-check (LDPC) code, the program code comprising instructions for executing a method that comprises:
dividing, by a decoder, an LDPC code C whose bit length is n into k divided LDPC codes D, the LDPC code C={c1,c2,c3,K,cn-1,cn}, the divided LDPC codes D={D1,D2,K,Dk-1,Dk}, Di={c(i-1)l+1,c(i-1)l+2,K,cil-1,cil}, i=1,2,K,k−1,k, and a bit length of the Di comprising l=n/k;
arranging, by the decoder, the Di,i=1,2,K,k−1,k by column to obtain transpose codes (DT) of the divided LDPC codes D, the DT={D1T,D2T,K,Dk-1T,DkT}, DiT={c(i-1)l+1,c(i-1)l+2,K,cil-1,cil}T,i=1,2,K,k−1,k;
performing, by the decoder, cyclic shift on the DiTi=1,2K,k−1,k by row according to values of corresponding elements in a target check matrix to obtain shift codes (E), the E={E1,E2,K,Et-1,t}, t being equal to a quantity of rows of the target check matrix, Ej comprising a result of shifting the DT according to an element of a jth row in the target check matrix, and j=1,2,K,t−1,t;
obtaining, by the decoder, t*m groups of LDPC subcodes according to the E and a bit length of the decoder (d), the LDPC subcodes comprising F1,F2,K,Ftm-1,Ftm, the Ej being divided into m groups, the Ej={(Ej)1d,(Ej)d+12d,K,(Ej)(m-2)d+1(m-1)d,(Ej)(m-1)d+1md}={F(j-1)m+1,F(j-1)m+2,K,Fjm-1,Fjm}, (Ej)(s-1)d+1sd, s=1,2,K,m−1,m denoting an [(s−1)d+1]th row to an (sd)th row of the Ej, and m=┌l/d┐; and
decoding, by the decoder, m groups of the LDPC subcodes to obtain a decoding result of the LDPC code C such that a quantity of parallel decoding operations on the LDPC code C being controlled flexibly.

### Claim 14 (depends on 13)

The computer program product of claim 13, wherein decoding the in groups of the LDPC subcodes to obtain the decoding result of the LDPC code C comprises:
obtaining, by the decoder, log likelihood ratio (LLR) values corresponding to the LDPC subcodes, the LLR values corresponding to the LDPC subcodes comprising G1,G2,K,Gtm-1,Gtm;
updating, by the decoder, check nodes according to the LLR values in an order of r=1,2,K,tm−1,tm to obtain a row-updated matrix;
updating, by the decoder, variable nodes column by column according to the row-updated matrix to obtain a column-updated matrix; and
performing, by the decoder, decision and checking on the column-updated matrix to obtain the decoding result of the LDPC code C.

### Claim 15 (depends on 13)

The computer program product of claim 13, wherein the LDPC code C comprises a quasi-cyclic LDPC (QC-LDPC) code, and the l comprising an inflation factor of the QC-LDPC code.

### Claim 16 (depends on 13)

The computer program product of claim 13, wherein the d comprises sixty.

### Claim 17 (depends on 13)

The computer program product of claim 13, wherein the d comprises one hundred eighty.

### Claim 18 (depends on 13)

The computer program product of claim 13, wherein decoding the m groups of the LDPC subcodes to obtain the decoding result of the LDPC code C comprises decoding, by the decoder, the m groups of the LDPC subcodes using a minimum sum (Min-sum) decoding algorithm to obtain the decoding result of the LDPC code C.