# US 10,484,003 B2 · A/D converter > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,484,003 B2 - Document ID: US10484003B2 - Status: Granted - Kind: B2 - Application number: 16/224,213 - Filed: 2018-12-18 - Published: 2019-07-11 - Granted: 2019-11-19 - Earliest claimed: 2018-01-11 - Assignees: Denso Corporation - Applicants: Denso Corporation - Inventors: Tomohiro Nezuka - Web page: https://patentgrep.com/patent/US10484003B2 ## CPC - H03M 3/02: Delta modulation, i.e. one-bit differential modulation {(H03M3/30 takes precedence)} - H03F 3/45: Differential amplifiers (differential sense amplifiers G11C7/062) - H03F 3/45475: {using IC blocks as the active amplifying circuit} - H03M 1/44: Sequential comparisons in series-connected stages with change in value of analogue signal - H03F 2203/45514: the FBC comprising one or more switched capacitors, and being coupled between the LC and the IC - H03M: CODING; DECODING; CODE CONVERSION IN GENERAL (using fluidic means F15C4/00; optical analogue/digital converters G02F7/00; coding, decoding or code conversion, specially adapted for particular applications, see the relevant subclasses, e.g. G01D, G01R, G06F, G06T, G09G, G10L, G11B, G11C, H04B, H04L, H04M, H04N; ciphering or deciphering for cryptography or other purposes involving the need for secrecy G09C) - H03F: AMPLIFIERS ## Abstract An A/D converter includes an integrator having an operational amplifier, a first feedback capacitor, and a second feedback capacitor, a quantizer outputting a quantization result of an output signal of the operational amplifier, and a D/A converter having a D/A converter capacitor. The D/A converter capacitor has a first terminal connected to an input terminal of the operational amplifier and a second terminal connected to an output terminal of the operational amplifier. The D/A converter performs a subtraction operation by repeating subtraction of charges accumulated in the first and second feedback capacitors based on the quantization result, and performs a cyclic operation by sequentially repeating subtraction and amplification of the charges accumulated in one of the first and second feedback capacitors based on the quantization result. ## Claims ### Claim 1 An A/D converter comprising: an integrator that includes an operational amplifier, and a first feedback capacitor and a second feedback capacitor which are connected in parallel with each other between a first input terminal and an output terminal of the operational amplifier; a quantizer that outputs a quantization result obtained by quantizing an output signal output from the output terminal of the operational amplifier; and a D/A converter that includes a D/A converter capacitor having a first terminal connected to the first input terminal of the operational amplifier, wherein the integrator includes a first feedback switch interposed between the first feedback capacitor and the output terminal of the operational amplifier and a second feedback switch interposed between the second feedback capacitor and the output terminal of the operational amplifier, an input signal is input to at least one of a portion between the first feedback capacitor and the first feedback switch, and a portion between the second feedback capacitor and the second feedback switch, the D/A converter capacitor has a second terminal on an opposite side to the first terminal of the D/A converter capacitor, and the second terminal of the D/A converter is connected to the output terminal of the operational amplifier, the D/A converter repeatedly subtracts charges from charges accumulated in the first feedback capacitor and the second feedback capacitor based on the quantization result to perform A/D conversion of the input signal, and performs subtraction operation for outputting a residual of the A/D conversion as the output signal of the operational amplifier, the D/A converter transfers the charges accumulated in the first feedback capacitor to the second feedback capacitor after the subtraction operation to perform amplification operation for amplifying the residual of the A/D conversion in the subtraction operation, the D/A converter repeats subtraction and amplification sequentially based on the quantization result for the residual of the A/D conversion in the subtraction operation amplified by the amplification operation, to perform cyclic operation for A/D converting the residual of the A/D conversion in the subtraction operation, and the D/A converter performs the A/D conversion of the input signal by adding a result of the A/D conversion in the cyclic operation to a result of the A/D conversion in the subtraction operation. ### Claim 2 (depends on 1) The A/D converter according to claim 1, further comprising a third feedback capacitor in addition to the first feedback capacitor and the second feedback capacitor, wherein the D/A converter performs the amplification operation a plurality of times by sequentially transferring the charges accumulated in the first feedback capacitor and the third feedback capacitor to the second feedback capacitor. ### Claim 3 (depends on 1) The A/D converter according to claim 1, wherein the D/A converter includes a first D/A converter and a second D/A converter which are connected in parallel to the first input terminal of the operational amplifier, and performs the cyclic operation by alternately using the first D/A converter and the second D/A converter. ### Claim 4 (depends on 1) The A/D converter according to claim 1, wherein the D/A converter performs an error cancellation operation for transferring the charges accumulated in the second feedback capacitor to the D/A converter capacitor after the subtraction operation and before transitioning to the cyclic operation. ### Claim 5 (depends on 1) The A/D converter according to claim 1, wherein a cycle in which the amplification operation operates is longer than a cycle in which the subtraction operation and the cyclic operation operate. ### Claim 6 (depends on 1) The A/D converter according to claim 1, wherein a cycle in which the subtraction operation operates is shorter than a cycle in which the cyclic operation operates. ### Claim 7 (depends on 1) The A/D converter according to claim 1, wherein the D/A converter is used as a 5-level D/A converter in the subtraction operation. ### Claim 8 (depends on 1) The A/D converter according to claim 1, wherein the D/A converter is used as a three-level D/A converter in the cyclic operation.