# US 10,483,961 B2 · Charge injector with integrated level shifter for localized mitigation of supply voltage droop > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,483,961 B2 - Document ID: US10483961B2 - Status: Granted - Kind: B2 - Application number: 15/925,396 - Filed: 2018-03-19 - Published: 2019-09-19 - Granted: 2019-11-19 - Earliest claimed: 2018-03-19 - Assignees: Intel Corporation - Applicants: Intel Corporation - Inventors: Suyoung Bang; Minki Cho; Pascal Meinerzhagen; Muhammad Khellah - Web page: https://patentgrep.com/patent/US10483961B2 ## CPC - H03K 17/145: {in field-effect transistor switches} - H03K 17/161: {in field-effect transistor switches} - H03K 17/102: {in field-effect transistor switches} - H03K 17/284: in field effect transistor switches - H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M) ## Abstract An apparatus is provided which comprises: a first power supply rail to provide a first power supply voltage; a second power supply rail to provide a second power supply voltage, wherein the first power supply voltage is higher than the second power supply voltage; a first circuitry coupled to the first and second supply rails, wherein the first circuitry is to operate using the first supply voltage, and wherein the first circuitry is to inject charge on to the second power supply rail in response to a droop indication; and a second circuitry to detect voltage droop on the second power supply rail, wherein the second circuitry is to generate the droop indication for the first circuitry. ## Claims ### Claim 1 An apparatus comprising: a first power supply rail to provide a first power supply voltage; a second power supply rail to provide a second power supply voltage, wherein the first power supply voltage is higher than the second power supply voltage; a first circuitry coupled to the first and second supply rails, wherein the first circuitry is to operate using the first power supply voltage, wherein the first circuitry is to inject charge on to the second power supply rail in response to a droop indication, wherein the first circuitry comprises a level-shifter with an asymmetric input pair circuitry, and wherein the asymmetric input pair circuitry is to turn on the first circuitry faster than turning the first circuitry off; and a second circuitry to detect voltage droop on the second power supply rail, wherein the second circuitry is to generate the droop indication for the first circuitry. ### Claim 2 (depends on 1) The apparatus of claim 1, wherein the second circuitry comprises a comparator which compares the second power supply voltage with a reference and generates the droop indication when the second power supply voltage falls below the reference. ### Claim 3 (depends on 1) The apparatus of claim 1, wherein the droop indication is a pulse having a pulse width proportional to a duration of the voltage droop. ### Claim 4 (depends on 1) The apparatus of claim 1 comprises a voltage regulator coupled to the first and second power supply rails, wherein the voltage regulator is to regulate the second power supply voltage using the first power supply voltage as input. ### Claim 5 An apparatus comprising: a first power supply rail to provide a first power supply voltage; a second power supply rail to provide a second power supply voltage, wherein the first power supply voltage is higher than the second power supply voltage; a voltage regulator coupled to the first and second power supply rails, wherein the voltage regulator is to regulate the second power supply voltage using the first power supply voltage as input; a transistor coupled to the second power supply rail and a third power supply rail, wherein the transistor is controllable by a low power mode signal; a first circuitry coupled to the first and third supply rails, wherein the first circuitry is to operate using the first power supply voltage, and wherein the first circuitry is to inject charge on to the third power supply rail in response to a droop indication; and a second circuitry to detect voltage droop on the third power supply rail, wherein the second circuitry is to generate the droop indication for the first circuitry. ### Claim 6 (depends on 5) The apparatus of claim 5, wherein the transistor is a p-type transistor. ### Claim 7 (depends on 5) The apparatus of claim 5, wherein the first circuitry comprises a level-shifter. ### Claim 8 (depends on 5) The apparatus of claim 5, wherein the first circuitry comprises an asymmetric input pair circuitry which is to turn on the first circuitry faster than turning the first circuitry off. ### Claim 9 (depends on 5) The apparatus of claim 5, wherein the second circuitry comprises a comparator which is to compare a third power supply voltage on the third power supply rail with a reference and is to generate the droop indication when the third power supply voltage falls below the reference. ### Claim 10 (depends on 5) The apparatus of claim 5, wherein the droop indication is a pulse having a pulse width proportional to a duration of the voltage droop. ### Claim 11 A system comprising: a memory; a processor coupled to the memory, wherein the processor comprises multiple power domains that can be controlled independent from one another, wherein the multiple power domains include a first power domain and a second power domain, and wherein the processor comprises: a first power supply rail to provide a first power supply voltage; a second power supply rail to provide a second power supply voltage, wherein the first power supply voltage is higher than the second power supply voltage; a voltage regulator coupled to first and second power supply rails, wherein the voltage regulator is to regulate a second power supply voltage using the first power supply voltage as input; a first transistor coupled to the second power supply rail and a third power supply rail, wherein the first transistor and the third power supply rail are part of the first power domain; a second transistor coupled to the second power supply rail and a fourth power supply rail, wherein the second transistor and the fourth power supply rail are part of the second power domain; a first pair of first and second circuitries in the first power supply domain, wherein the first circuitry is to inject charge on the third power supply rail in response to a droop indication by the second circuitry, and wherein the second circuitry is to detect a voltage droop on the third power supply rail; and a second pair of first and second circuitries in the second power supply domain, wherein the first circuitry of the second pair is to inject charge on the fourth power supply rail in response to a droop indication by the second circuitry of the second pair, and wherein the second circuitry of the second pair is to detect a voltage droop on the fourth power supply rail; and a wireless interface to allow the processor to communicate with another device. ### Claim 12 (depends on 11) The system of claim 11, wherein the first and second transistors are p-type transistors, wherein the first transistor is controllable by a first low power mode signal, and wherein the second transistor is controllable by a second low power mode signal. ### Claim 13 (depends on 11) The system of claim 11, wherein each of the first circuitries of the first and second pair comprise a level-shifter. ### Claim 14 (depends on 11) The system of claim 11, wherein each of the first circuitries of the first and second pair comprise an asymmetric input pair circuitry which is to turn on the first circuitry faster than turning the first circuitry off. ### Claim 15 (depends on 11) The system of claim 11, wherein the droop indication is a pulse having a pulse width proportional to a duration of the voltage droop. ### Claim 16 (depends on 11) The system of claim 11, wherein the multiple power domains includes a third power supply domain, wherein the processor comprises a third transistor coupled to the second power supply rail and a fifth power supply rail, and wherein the third transistor and the fifth power supply rail are part of the second power domain. ### Claim 17 (depends on 16) The system of claim 16, wherein the processor comprises a third pair of first and second circuitries in the third power supply domain, wherein the first circuitry of the third pair is to inject charge on the fifth power supply rail in response to a droop indication by the second circuitry of the third pair, and wherein the second circuitry of the third pair is to detect a voltage droop on the fifth power supply rail. ### Claim 18 (depends on 17) The system of claim 17, wherein the first circuitry of the third pair comprises an asymmetric input pair circuitry which is to turn on the first circuitry of the third pair faster than turning off the first circuitry of the third pair. ### Claim 19 An apparatus comprising: a first power supply rail to provide a first power supply voltage; a second power supply rail to provide a second power supply voltage, wherein the first power supply voltage is higher than the second power supply voltage; a first circuitry coupled to the first and second supply rails, wherein the first circuitry is to operate using the first power supply voltage, wherein the first circuitry is to inject charge on to the second power supply rail in response to a droop indication, and wherein the first circuitry comprises a level-shifter with an asymmetric input pair circuitry; a second circuitry to detect voltage droop on the second power supply rail, wherein the second circuitry is to generate the droop indication for the first circuitry; and a voltage regulator coupled to the first and second power supply rails, wherein the voltage regulator is to regulate the second power supply voltage using the first power supply voltage as input. ### Claim 20 (depends on 19) The apparatus of claim 19, wherein the second circuitry comprises a comparator which compares the second power supply voltage with a reference and generates the droop indication when the second power supply voltage falls below the reference. ### Claim 21 (depends on 19) The apparatus of claim 19, wherein the asymmetric input pair circuitry is to turn on the first circuitry faster than turning the first circuitry off.