# US 10,483,917 B2 · Power amplifier for millimeter wave devices > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,483,917 B2 - Document ID: US10483917B2 - Status: Granted - Kind: B2 - Application number: 16/428,842 - Filed: 2019-05-31 - Published: 2019-09-19 - Granted: 2019-11-19 - Earliest claimed: 2017-12-20 - Assignees: Globalfoundries Inc. - Applicants: Globalfoundries Inc. - Inventors: See Taur Lee; Abdellatif Bellaouar - Web page: https://patentgrep.com/patent/US10483917B2 ## CPC - H03F 1/0205: {in transistor amplifiers} - H03F 3/193: with field-effect devices (H03F3/195 takes precedence) - H03F 3/21: with semiconductor devices only {(H03F3/245 takes precedence)} - H03F 3/45085: {Long tailed pairs (H03F3/45112, H03F3/45139 take precedence)} - H03F 3/45165: {Complementary cross coupled types} - H04B 1/04: Circuits - H03F 2200/451: the amplifier being a radio frequency amplifier - H03F 2200/534: Transformer coupled at the input of an amplifier - H03F 2200/541: Transformer coupled at the output of an amplifier - H03F 2203/45318: the AAC comprising a cross coupling circuit, e.g. two extra transistors cross coupled - H03F 2203/45621: the IC comprising a transformer for phase splitting the input signal - H03F 2203/45731: the LC comprising a transformer - H04B 2001/0408: {with power amplifiers} - H03F: AMPLIFIERS - H04B: TRANSMISSION ## Abstract We disclose apparatus which may provide power amplification in millimeter-wave devices with reduced size and reduced power consumption, and methods of using such apparatus. One such apparatus comprises an input transformer; a first differential pair of injection transistors comprising a first transistor and a second transistor; a first back gate voltage source configured to provide a first back gate voltage to the first transistor; a second back gate voltage source configured to provide a second back gate voltage to the second transistor; a second differential pair of oscillator core transistors comprising a third transistor and a fourth transistor, wherein the third transistor and the fourth transistor are cross-coupled; a third back gate voltage source configured to provide a third back gate voltage to the third transistor; a fourth back gate voltage source configured to provide a fourth back gate voltage to the fourth transistor; and an output transformer. ## Claims ### Claim 1 An apparatus, comprising: a first circuit configured to provide an injection current, the first circuit comprising at least a first transistor, wherein a tuning of an injection current is at least partially controlled by a first back gate voltage of the first transistor; an oscillator circuit configured to receive the injection current, wherein the oscillator circuit comprises a second transistor, wherein an oscillator circuit current tuning is at least partially controlled by a second back gate voltage of the second transistor; and a back gate voltage source capable of providing the first back gate voltage and the second back gate voltage. ### Claim 2 (depends on 1) The apparatus of claim 1, wherein the back gate voltage source comprises: a first voltage source portion for providing the first back gate voltage; and a second voltage source portion for providing the second back gate voltage. ### Claim 3 (depends on 2) The apparatus of claim 2, wherein the first voltage source portion is configured to adjust the first back gate voltage and the second voltage source portion is configured to adjust the second back gate voltage. ### Claim 4 (depends on 2) The apparatus of claim 2, wherein the first voltage source portion is configured to perform at least one of increasing the first back gate voltage to reduce a lock-in time of the power amplifier and decreasing the first back gate voltage to reduce a power consumption of the power amplifier. ### Claim 5 (depends on 2) The apparatus of claim 2, wherein the second voltage source portion is configured to perform at least one of increasing the second back gate voltage to increase output power of the power amplifier and adjusting the second back gate voltage to compensate current fluctuation of the power amplifier. ### Claim 6 (depends on 1) The apparatus of claim 1, wherein: the apparatus is a power amplifier; and the oscillator circuit comprises an oscillator core, wherein the oscillator circuit is configured to provide a clock signal in one or more of a plurality of frequencies in the millimeter wave range. ### Claim 7 (depends on 6) The apparatus of claim 6, further comprising: an input transformer configured to receive an input signal, wherein the input is at least one of a differential input or a single-ended input; an output transformer configured to provide an output signal, wherein the output signal is a differential output; and a power detector configured to detect the power on each end of the differential output provided by the output transformer. ### Claim 8 (depends on 1) The apparatus of claim 1, wherein the first transistor and the second transistor are fully-depleted silicon-on-insulator (FDSOI) transistors. ### Claim 9 A power amplifier, comprising: a circuit comprising at least a first transistor and configured to provide an injection current, wherein an injection current tuning depends at least in part on a first back gate voltage of the first transistor; an oscillator core comprising at least a second transistor and configured to receive the injection current, wherein an oscillator core current tuning depends at least in part on a second back gate voltage of the second transistor; and either a first back gate voltage source configured to provide the first back gate voltage, a second back gate voltage source configured to provide the second back gate voltage, or both. ### Claim 10 (depends on 9) The power amplifier of claim 9, comprising both the first back gate voltage source and the second back gate voltage source. ### Claim 11 (depends on 9) The power amplifier of claim 9, wherein the first back gate voltage source is configured to adjust the first back gate voltage and the second back gate voltage source is configured to adjust the second back gate voltage. ### Claim 12 (depends on 11) The power amplifier of claim 11, wherein the first back gate voltage source is configured to perform at least one of increasing the first back gate voltage to reduce a lock-in time of the power amplifier and decreasing the first back gate voltage to reduce a power consumption of the power amplifier. ### Claim 13 (depends on 9) The power amplifier of claim 9, wherein the second back gate voltage source is configured to perform at least one of increasing the second back gate voltage to increase output power of the power amplifier and adjusting the second back gate voltage to compensate current fluctuation of the power amplifier. ### Claim 14 (depends on 9) The power amplifier of claim 9, further comprising an input transformer configured to receive an input signal, wherein the input is at least one of a differential input or a single-ended input. ### Claim 15 (depends on 9) The power amplifier of claim 9, further comprising an output transformer configured to provide an output signal, wherein the output signal is a differential output. ### Claim 16 (depends on 15) The power amplifier of claim 15, further comprising a power detector configured to detect the power on each end of the differential output provided by the output transformer. ### Claim 17 (depends on 9) The power amplifier of claim 9, wherein the first transistor and the second transistor are fully-depleted silicon-on-insulator (FDSOI) transistors. ### Claim 18 A power amplifier system, comprising: a power amplifier, comprising: a circuit comprising at least a first transistor and configured to provide an injection current, wherein an injection current tuning depends at least in part on a first back gate voltage of the first transistor; an oscillator core comprising at least a second transistor and configured to receive the injection current, wherein an oscillator core current tuning depends at least in part on a second back gate voltage of the second transistor; either a first back gate voltage source configured to provide the first back gate voltage, a second back gate voltage source configured to provide the second back gate voltage, or both; an output transformer configured to provide an output signal, wherein the output signal is a differential output; and a power detector configured to detect a first power on a first end of the differential output and a second power on a second end of the differential output; and a difference determination unit configured to determine a difference between the first power and the second power; wherein the first back gate voltage source is configured to adjust the first back gate voltage in response to the first power and the second power differing by equal to or greater than a first threshold, the second back gate voltage source is configured to set the second back gate voltage to a default value in response to the first back gate voltage being adjusted to a maximum value, or both. ### Claim 19 (depends on 18) The power amplifier system of claim 18, wherein the first threshold is 0.1 dB. ### Claim 20 (depends on 18) The power amplifier system of claim 18, wherein the power detector is configured to detect the first power and the second power by measuring leakage of the first differential output and the second differential output.