# US 10,483,802 B2 · Peak voltage detection in a differentially driven wireless resonant transmitter > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,483,802 B2 - Document ID: US10483802B2 - Status: Granted - Kind: B2 - Application number: 15/458,195 - Filed: 2017-03-14 - Published: 2018-09-20 - Granted: 2019-11-19 - Earliest claimed: 2017-03-14 - Assignees: Texas Instruments Incorporated - Applicants: Texas Instruments Incorporated - Inventors: Jingwei Xu; Vijayalakshmi Devarajan; Lindsay Langford - Web page: https://patentgrep.com/patent/US10483802B2 ## CPC - H02J 50/12: of the resonant type - H02M 3/04: by static converters - H02J 7/933: {the cycle being controlled or terminated in response to electric parameters} - H02J: ELECTRIC POWER NETWORKS; CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY - H02M: APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF (transformers H01F; dynamo-electric converters H02K47/00; controlling transformers, reactors or choke coils, control or regulation of electric motors, generators or dynamo-electric converters H02P) ## Abstract A wireless resonant power transmitter includes a first half-bridge and a second half-bridge adapted to be class D driven that are coupled to drive a series resonant circuit including a primary inductor (L) having a high side terminal and a low side terminal, and primary capacitor (C). A peak voltage sensor that includes a summing block is coupled across the high side terminal and the low side terminal of the primary L, and a peak-to-peak voltage detector is coupled to an output of the summing block to generate a DC voltage signal that is proportional to a peak-to-peak voltage across the primary C. ## Claims ### Claim 1 A wireless power circuit comprising: (a) a series resonant circuit including a primary capacitor and an inductor coupled in series, the primary capacitor having first and second terminals and the inductor having first and second terminals, a first terminal of the inductor being coupled to a second terminal of the primary capacitor; (b) a first half-bridge circuit having a terminal coupled to the first terminal of the capacitor; (c) a second half-bridge circuit having a terminal coupled to the second terminal of the inductor; (d) a summing circuit having a first summing terminal coupled to the first terminal of the inductor, a second summing terminal coupled to the second terminal of the inductor, and a center node terminal; and (e) a peek-to-peek voltage detector having an input coupled to the center node terminal of the summing circuit and having a voltage detector output. ### Claim 2 (depends on 1) The wireless power circuit of claim 1 in which the summing circuit includes a first resistor coupled between the first summing terminal and the center node terminal, and a second resistor coupled between the center node terminal and the second summing terminal. ### Claim 3 (depends on 2) The wireless power circuit of claim 2 in which the first resistor and the second resistor have equal resistances. ### Claim 4 (depends on 2) The wireless power circuit of claim 2 including a filter capacitor coupled between the center node terminal and a circuit ground. ### Claim 5 (depends on 2) The wireless power circuit of claim 2 including: (a) a third resistor having a first terminal coupled to the center node terminal and a second terminal, the third resistor having a resistance less than a resistance of the second resistor; and (b) a DC power supply having a supply terminal coupled to the second terminal of the third resistor and a ground terminal coupled to a circuit ground. ### Claim 6 (depends on 5) The wireless power circuit of claim 5 in which the DC power supply provides a DC voltage of 2.5 volts at the supply terminal. ### Claim 7 (depends on 1) The wireless power circuit of claim 1 in which the peak-to-peak voltage detector includes: (a) a peak envelope detector sample and hold circuit having an input coupled to the center node; and (b) a valley envelope detector sample and hold circuit having an input coupled to the center node. ### Claim 8 (depends on 7) The wireless power circuit of claim 7 in which the peak envelope detector sample and hold circuit includes comparators and the valley envelope detector sample and hold circuit includes comparators. ### Claim 9 (depends on 1) The wireless power circuit of claim 1 including a DC to DC controller having an input coupled to the voltage detector output, a power in input, a target voltage input, and a voltage output coupled to the first half-bridge circuit and to the second half-bridge circuit. ### Claim 10 A process of peak-to-peak detection comprising: (a) applying voltage pulses to a serial coupled primary capacitor and inductor; (b) summing voltages from across the inductor to provide a summing output signal at a center node; and (c) processing the summing output signal to generate a DC voltage signal that is proportional to a peak-to-peak voltage across the primary capacitor. ### Claim 11 (depends on 10) The process of claim 10 in which the applying voltage pulses includes applying a power supply voltage to a first half-bridge coupled to the primary capacitor and to a second half-bridge coupled to the inductor. ### Claim 12 (depends on 11) The process of claim 11 including controlling the power supply voltage to the first and second half-bridges with a DC to DC controller in response to the generated DC voltage signal. ### Claim 13 (depends on 10) The process of claim 10 in which the processing includes extracting a peak envelope signal and a valley envelope signal from the summing output signal with sample and hold circuits that include comparators. ### Claim 14 (depends on 10) The process of claim 10 in which the summing voltages from across the inductor includes summing voltages with a first resistor coupled between one terminal of the inductor to the center node and a second resistor coupled between another terminal of the inductor and the center node. ### Claim 15 (depends on 14) The process of claim 14 in which the resistances of the first resistor and the second resistor are equal. ### Claim 16 (depends on 14) The process of claim 14 including reducing a voltage of the summing output signal with a third resistor coupled between the center node and a circuit ground, the third resistor having a resistance less than a resistance of the second resistor. ### Claim 17 (depends on 16) The process of claim 16 including applying a common mode voltage to between the third resistor and the circuit ground. ### Claim 18 (depends on 10) The process of claim 10 including filtering the summing output signal with a filter capacitor coupled between the center node and a circuit ground.