# US 10,483,427 B2 · Method of manufacturing solar cell

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- Number: US 10,483,427 B2
- Document ID: US10483427B2
- Status: Granted
- Kind: B2
- Application number: 15/831,904
- Filed: 2017-12-05
- Published: 2018-06-07
- Granted: 2019-11-19
- Earliest claimed: 2016-12-05
- Assignees: LG Electronics Inc.
- Applicants: LG Electronics Inc.
- Inventors: Jaewoo Choi; Chungyi Kim
- Web page: https://patentgrep.com/patent/US10483427B2

## CPC

- H10F 71/129: {Passivating}
- H10F 10/165: the heterojunctions being Group IV-IV heterojunctions, e.g. Si/Ge, SiGe/Si or Si/SiC photovoltaic cells
- H10F 10/166: the Group IV-IV heterojunctions being heterojunctions of crystalline and amorphous materials, e.g. silicon heterojunction [SHJ] photovoltaic cells
- H10F 71/121: {The active layers comprising only Group IV materials}
- H10F 71/1221: {comprising polycrystalline silicon}
- H10F 71/134: {Irradiation with electromagnetic or particle radiation}
- H10F 77/703: {of the semiconductor bodies, e.g. textured active layers}
- Y02E 10/546: Polycrystalline silicon PV cells
- Y02E 10/547: Monocrystalline silicon PV cells
- Y02P 70/50: Manufacturing or production processes characterised by the final manufactured product
- H10F: INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- Y02E: REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02P: CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS

## Abstract

A method of manufacturing a solar cell is disclosed. The method includes an overlap operation of overlapping front surfaces of two semiconductor substrates each other, a semiconductor layer depositing operation of simultaneously depositing a semiconductor layer on back surfaces of the two semiconductor substrates overlapping each other, a separating operation of separating the two semiconductor substrates overlapping each other, and a front surface texturing operation of texturing the front surfaces of the two semiconductor substrates after an etch stop layer forming operation.

## Claims

### Claim 1

A method of manufacturing a solar cell, the method comprising:
an overlapping operation of overlapping a first surface of a first semiconductor substrate made of a silicon wafer to a first surface of a second semiconductor substrate made of a silicon wafer to form an overlapped semiconductor substrate, wherein the first surface of the first semiconductor substrate and the first surface of the second semiconductor substrate contact each other;
a semiconductor layer depositing operation of depositing a first semiconductor layer on a second surface of the first semiconductor substrate and a second semiconductor layer on a second surface of the second semiconductor substrate, wherein the second surface of the first semiconductor substrate is positioned at an opposite side of the first surface of the first semiconductor substrate and the second surface of the second semiconductor substrate is positioned at an opposite side of the first surface of the second semiconductor substrate;
a separating operation of separating the overlapped semiconductor substrate into the first semiconductor substrate and the second semiconductor substrate; and
a texturing operation of texturing the first surface of the first semiconductor substrate.

### Claim 2 (depends on 1)

The method of claim 1, further comprising:
a protective layer forming operation that is performed after the overlapping operation and before the semiconductor layer depositing operation and that comprises forming a first protective layer on the second surface of the first semiconductor substrate and a second protective layer on the second surface of the second semiconductor substrate,
wherein the semiconductor layer depositing operation includes depositing the first semiconductor layer on the first protective layer and the second semiconductor layer on the second protective layer.

### Claim 3 (depends on 2)

The method of claim 2, wherein the overlapping operation includes:
overlapping the first semiconductor substrate to the second semiconductor substrate by placing the first semiconductor substrate and the second semiconductor substrate together at a section of a frame, and
placing the overlapped semiconductor substrate at the section of the frame inside a deposition equipment for the semiconductor layer depositing operation.

### Claim 4 (depends on 2)

The method of claim 2, wherein the semiconductor layer depositing operation is performed using a low pressure chemical vapor deposition (LPCVD) equipment.

### Claim 5 (depends on 1)

The method of claim 1, wherein each of the first semiconductor layer and the second semiconductor layer includes at least one of intrinsic amorphous silicon, intrinsic polycrystalline silicon, amorphous silicon having impurities, or polycrystalline silicon having impurities.

### Claim 6 (depends on 5)

The method of claim 5, wherein the first semiconductor layer includes a first conductive region having impurities of a first conductive type or a second conductive region having impurities of a second conductivity type that is opposite to the first conductivity type.

### Claim 7 (depends on 6)

The method of claim 6, further comprising:
a first thermal processing operation that is performed between the separating operation and the texturing operation and that comprises thermally processing at least one portion of the first semiconductor layer that is formed on the second surface of the first semiconductor substrate to form the first conductive region;
a second thermal processing operation that is performed after the texturing operation and that comprises thermally processing, to form a second conductive region, (i) the first surface of the first semiconductor substrate and (ii) a portion of the first semiconductor layer that excludes the at least one portion of the first semiconductor layer formed on the second surface of the first semiconductor layer; and
an electrode forming operation of forming a first electrode on the first conductive region and forming a second electrode on the second conductive region.

### Claim 8 (depends on 7)

The method of claim 7, wherein the first thermal processing operation includes:
thermally processing the at least one portion of the first semiconductor layer
to form the portion of the first semiconductor layer as the first conductive region.

### Claim 9 (depends on 5)

The method of claim 5, wherein the first surface of the first semiconductor substrate includes a third conductive region having impurities of a first conductivity type, and
wherein the first semiconductor layer that is deposited on the second surface of the first semiconductor substrate includes a fourth conductivity region comprising at least one of amorphous silicon or polycrystalline that have impurities of a second conductive type being opposite to the first conductive type.

### Claim 10 (depends on 9)

The method of claim 9, further comprising:
a thermal processing operation that is performed after the texturing operation and that comprises thermally processing (i) at least one portion of the first surface of the first semiconductor substrate to form the third conductive region and (ii) at least one portion of the first semiconductor layer to form the fourth conductive region; and
an electrode forming operation of forming a third electrode that is coupled to the third conductive region and a fourth electrode that is coupled to the fourth conductive region.

### Claim 11 (depends on 1)

The method of claim 1, wherein a thickness of the first semiconductor layer and a thickness of the second semiconductor layer are from 250 nm to 450 nm.

### Claim 12 (depends on 1)

The method of claim 1, wherein the semiconductor layer depositing operation further comprises:
depositing a third semiconductor layer on a third surface of the first semiconductor substrate.

### Claim 13 (depends on 12)

The method of claim 12, wherein the texturing operation includes:
texturing the first surface of the first semiconductor substrate using a reactive ion etching (ME) method or a wet etching method, and
removing the third semiconductor layer formed on the third surface of the first semiconductor substrate.

### Claim 14 (depends on 13)

The method of claim 13, wherein an etching depth of the first surface of the first semiconductor substrate is from 100 nm to 5 μm.

### Claim 15 (depends on 1)

The method of claim 1, wherein the separating operation includes individually separating the overlapped semiconductor substrate.

### Claim 16

A method of manufacturing a solar cell, the method comprising:
an overlapping operation of overlapping a first surface of a first semiconductor substrate to a first surface of a second semiconductor substrate to form an overlapped semiconductor substrate;
a semiconductor layer depositing operation of depositing a first semiconductor layer on a second surface of the first semiconductor substrate and a second semiconductor layer on a second surface of the second semiconductor substrate;
a separating operation of separating the overlapped semiconductor substrate into the first semiconductor substrate and the second semiconductor substrate;
a texturing operation of texturing the first surface of the first semiconductor substrate;
a thermal processing operation of thermally processing the first semiconductor substrate to form a first conductive region having impurities of a first conductivity type and a second conductive region having impurities of a second conductivity type that is opposite to the first conductivity type; and
an electrode forming operation of forming a first electrode that is coupled to the first conductive region and a second electrode that is coupled to the second conductive region.

### Claim 17 (depends on 16)

The method of claim 16, wherein the first semiconductor layer includes at least one of intrinsic amorphous silicon, intrinsic polycrystalline silicon, amorphous silicon having impurities, or polycrystalline silicon having impurities.

### Claim 18 (depends on 16)

The method of claim 16, wherein the semiconductor layer depositing operation further comprises:
depositing a third semiconductor layer on a third surface of the first semiconductor substrate.

### Claim 19 (depends on 16)

The method of claim 16, wherein the texturing operation includes:
texturing the first surface of the first semiconductor substrate using an RIE method or a wet etching method, and
removing a third semiconductor layer formed on a third surface of the first semiconductor substrate.

### Claim 20 (depends on 16)

The method of claim 16, wherein the separating operation includes individually separating the overlapped semiconductor substrate.