# US 10,483,387 B2 · Lateral/vertical semiconductor device with embedded isolator > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,483,387 B2 - Document ID: US10483387B2 - Status: Granted - Kind: B2 - Application number: 15/464,609 - Filed: 2017-03-21 - Published: 2017-07-06 - Granted: 2019-11-19 - Earliest claimed: 2013-07-18 - Assignees: Sensor Electronic Technology, Inc. - Applicants: Sensor Electronic Technology, Inc. - Inventors: Grigory Simin; Mikhail Gaevski; Michael Shur; Remigijus Gaska - Web page: https://patentgrep.com/patent/US10483387B2 ## CPC - H10D 30/4755: {having wide bandgap charge-carrier supplying layers, e.g. modulation doped HEMTs such as n-AlGaAs/GaAs HEMTs} - H10D 30/477: {Vertical HEMTs or vertical HHMTs} - H10D 62/116: {adjoining the input or output regions of field-effect devices, e.g. adjoining source or drain regions} - H10D 62/824: comprising only Group III-V materials heterojunctions, e.g. GaN/AlGaN heterojunctions - H10D 62/8503: {Nitride Group III-V materials, e.g. AlN or GaN} - H10D 64/2527: {for vertical devices wherein the source or drain electrodes are recessed in semiconductor bodies} - H10D 64/256: {for lateral devices wherein the source or drain electrodes are recessed in semiconductor bodies (source or drain electrodes of TFTs H10D30/673)} - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES ## Abstract A lateral/vertical device is provided. The device includes a device structure including a device channel having a lateral portion and a vertical portion. The lateral portion of the device channel can be located adjacent to a first surface of the device structure, and one or more contacts and/or a gate can be formed on the first surface. The device structure also includes a set of insulating layers located in the device structure between the lateral portion of the device channel and a second surface of the device structure opposite the first surface. An opening in the set of insulating layers defines a transition region between the lateral portion of the device channel and a vertical portion of the device channel. A contact to the vertical portion of the device channel can be located on the second surface. ## Claims ### Claim 1 A lateral/vertical device comprising: a device structure including a device channel, wherein the device channel includes a lateral portion, a vertical portion, and a transition region between the lateral portion and the vertical portion; a first contact to the lateral portion of the device channel; a second contact to the vertical portion of the device channel, wherein the first and second contacts are located on opposing surfaces of the device structure; a set of insulating layers having a resistivity above 1010 Ohm×cm and located in the device structure between the lateral portion of the device channel and the second contact, wherein an opening in the set of insulating layers defines the transition region of the device channel; and a channel layer located between the set of insulating layers and the second contact, and within the opening in the set of insulating layers. ### Claim 2 (depends on 1) The device of claim 1, wherein the device is one of: a light emitting diode (LED) or a semiconductor sensor. ### Claim 3 (depends on 1) The device of claim 1, wherein the set of insulating layers comprise silicon dioxide (SiO2). ### Claim 4 (depends on 1) The device of claim 1, wherein at least one of the set of insulating layers is formed of an air gap. ### Claim 5 (depends on 1) The device of claim 1, wherein the channel layer is formed of group III nitride-based materials. ### Claim 6 (depends on 1) The device of claim 1, wherein the device structure comprises a heterostructure including a plurality of layers formed of group III nitride-based materials, and wherein the lateral portion of the device channel is formed at a heterointerface between two layers in the heterostructure. ### Claim 7 (depends on 1) The device of claim 1, further comprising a gate to the transition region of the device channel, wherein the gate comprises a metal material. ### Claim 8 (depends on 1) The device of claim 1, further comprising a substrate located between the second contact and the channel layer, wherein the substrate comprises sapphire. ### Claim 9 A lateral/vertical field effect transistor comprising: a heterostructure including a device channel adjacent to a first surface of the device structure, wherein the device channel includes a lateral portion, a vertical portion, and a transition region between the lateral portion and the vertical portion; a first contact to the lateral portion of the device channel located on the first surface; a second contact to the vertical portion of the device channel, wherein the second contact is located on an opposing surface of the device structure as the first surface; a set of insulating layers having a resistivity above 1010 Ohm×cm and located in the device structure between the lateral portion of the device channel and the second contact, wherein an opening in the set of insulating layers defines the transition region of the device channel; and a channel layer located between the set of insulating layers and the second contact, and within the opening in the set of insulating layers. ### Claim 10 (depends on 9) The device of claim 9, wherein the set of insulating layers are formed of silicon dioxide (SiO2). ### Claim 11 (depends on 9) The device of claim 9, wherein the channel layer is formed of group III nitride-based materials. ### Claim 12 (depends on 9) The device of claim 9, wherein the heterostructure includes a plurality of layers formed of group III nitride-based materials. ### Claim 13 (depends on 9) The device of claim 9, further comprising a substrate located between the second contact and the channel layer, wherein the substrate comprises sapphire. ### Claim 14 A lateral/vertical device comprising: a device structure including a lateral portion of a device channel located adjacent to a first surface of the device structure, wherein the device structure includes a set of insulating layers having a resistivity above 1010 Ohm×cm and located in the device structure between the lateral portion of the device channel and a second surface of the device structure opposite the first surface, and wherein an opening in the set of insulating layers defines a transition region between the lateral portion of the device channel and a vertical portion of the device channel; a first contact to the lateral portion of the device channel on the first surface; a second contact to the vertical portion of the device channel on the second surface; and a channel layer located between the set of insulating layers and the second contact, and within the opening in the set of insulating layers. ### Claim 15 (depends on 14) The device of claim 14, wherein the set of insulating layers comprises silicon dioxide. ### Claim 16 (depends on 14) The device of claim 14, wherein the channel layer is formed of group III nitride-based materials. ### Claim 17 (depends on 14) The device of claim 14, further comprising a substrate located between the second contact and the channel layer, wherein the substrate comprises sapphire. ### Claim 18 (depends on 14) The device of claim 14, wherein at least one of the set of insulating layers is formed of an air gap. ### Claim 19 (depends on 14) The device of claim 14, wherein the device structure comprises a heterostructure including a plurality of layers formed of group III nitride-based materials, and wherein the lateral portion of the device channel is formed at a heterointerface between two layers in the heterostructure.