# US 10,483,365 B2 · Semiconductor device

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 10,483,365 B2
- Document ID: US10483365B2
- Status: Granted
- Kind: B2
- Application number: 15/251,382
- Filed: 2016-08-30
- Published: 2017-03-02
- Granted: 2019-11-19
- Earliest claimed: 2015-08-31
- Assignees: Semiconductor Energy Laboratory Co., Ltd.
- Applicants: Semiconductor Energy Laboratory Co., Ltd.
- Inventors: Akio Suzuki; Shinpei Matsuda; Shunpei Yamazaki
- Web page: https://patentgrep.com/patent/US10483365B2

## CPC

- H10D 30/6891: {characterised by the shapes, relative sizes or dispositions of the floating gate electrode}
- H10B 41/70: the floating gate being an electrode shared by two or more components
- H10D 30/43: having one-dimensional [1D] charge carrier gas channels, e.g. quantum wire FETs or transistors having 1D quantum-confined channels
- H10D 30/475: {having wider bandgap layer formed on top of lower bandgap active layer, e.g. undoped barrier HEMTs such as i-AlGaN/GaN HEMTs}
- H10D 30/673: {characterised by the shapes, relative sizes or dispositions of the gate electrodes}
- H10D 30/6735: {having gates fully surrounding the channels, e.g. gate-all-around}
- H10D 30/6755: {Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate}
- H10D 30/6757: {characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile (TFTs having channel structures for preventing kink or snapback effects H10D30/6708; TFTs having lightly-doped source or drain extensions H10D30/6715)}
- H10D 30/683: {programmed by tunnelling of carriers, e.g. Fowler-Nordheim tunnelling}
- H10D 62/121: {oriented parallel to substrates}
- H10D 64/035: {comprising conductor-insulator-conductor-insulator-semiconductor structures}
- H10D 99/00: Subject matter not provided for in other groups of this subclass
- H10D 30/435: {having multiple laterally adjacent 1D material channels}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10B: ELECTRONIC MEMORY DEVICES

## Abstract

A transistor which is resistant to a short-channel effect is provided. The transistor includes a first conductor in a ring shape, an oxide semiconductor including a region extending through an inside of a ring of the first conductor, a first insulator between the first conductor and the oxide semiconductor, a second insulator between the first conductor and the first insulator, and a charge trap layer inside the ring of the first conductor. The charge trap layer is inside the second insulator and configured to be in a floating state.

## Claims

### Claim 1

A semiconductor device comprising:
a first conductor, the first conductor being a first ring-shaped conductor;
an oxide semiconductor comprising a region extending through an inside of a ring of the first conductor;
a first insulator between the first conductor and the oxide semiconductor;
a second insulator between the first conductor and the first insulator; and
a second conductor inside the ring of the first conductor,
wherein the second conductor is inside the second insulator,
wherein the second conductor is configured to be in a floating state,
wherein an inner surface and an outer surface of the second conductor are in contact with the second insulator, and
wherein the inner surface of the second conductor faces to the first insulator.

### Claim 2 (depends on 1)

The semiconductor device according to claim 1,
wherein the second conductor is a second ring-shaped conductor.

### Claim 3 (depends on 1)

The semiconductor device according to claim 1, further comprising:
a third conductor and a fourth conductor with the first conductor sandwiched therebetween,
wherein the oxide semiconductor comprises a first region overlapping with the first conductor, a second region overlapping with the third conductor, and a third region overlapping with the fourth conductor,
wherein the oxide semiconductor comprises a fourth region between the first region and the second region, and a fifth region between the first region and the third region,
wherein the fourth region overlaps with neither the first conductor nor the third conductor, and
wherein the fifth region overlaps with neither the first conductor nor the fourth conductor.

### Claim 4 (depends on 3)

The semiconductor device according to claim 3,
wherein a length of the fourth region of the oxide semiconductor in a channel length direction is more than or equal to 2 nm and less than or equal to 10 nm, and
wherein a length of the fifth region of the oxide semiconductor in the channel length direction is more than or equal to 2 nm and less than or equal to 10 nm.

### Claim 5 (depends on 4)

The semiconductor device according to claim 4,
wherein a length of the first conductor in the channel length direction is more than or equal to 4 nm and less than or equal to 30 nm.

### Claim 6 (depends on 1)

The semiconductor device according to claim 1,
wherein the first insulator comprises at least one of indium, an element M, and zinc, and
wherein the element M is titanium, gallium, yttrium, zirconium, lanthanum, cerium, neodymium, tin, or hafnium.

### Claim 7 (depends on 1)

The semiconductor device according to claim 1,
wherein the oxide semiconductor comprises indium, an element M, zinc, and oxygen, and
wherein the element M is titanium, gallium, yttrium, zirconium, lanthanum, cerium, neodymium, tin, or hafnium.

### Claim 8

A semiconductor device comprising:
a first conductor, the first conductor being a first ring-shaped conductor;
an oxide semiconductor comprising a region extending through an inside of a ring of the first conductor;
a first insulator between the first conductor and the oxide semiconductor;
a second insulator between the first conductor and the first insulator; and
a third insulator inside the ring of the first conductor,
wherein the third insulator is inside the second insulator,
wherein the third insulator has a higher relative dielectric constant than the second insulator,
wherein an inner surface and an outer surface of the third insulator are in contact with the second insulator, and
wherein the inner surface of the third insulator faces to the first insulator.

### Claim 9 (depends on 8)

The semiconductor device according to claim 8,
wherein the second insulator comprises nitrogen and silicon.

### Claim 10 (depends on 8)

The semiconductor device according to claim 8,
wherein the third insulator is a second ring-shaped insulator.

### Claim 11 (depends on 8)

The semiconductor device according to claim 8, further comprising:
a third conductor and a fourth conductor with the first conductor sandwiched therebetween,
wherein the oxide semiconductor comprises a first region overlapping with the first conductor, a second region overlapping with the third conductor, and a third region overlapping with the fourth conductor,
wherein the oxide semiconductor comprises a fourth region between the first region and the second region, and a fifth region between the first region and the third region,
wherein the fourth region overlaps with neither the first conductor nor the third conductor, and
wherein the fifth region overlaps with neither the first conductor nor the fourth conductor.

### Claim 12 (depends on 11)

The semiconductor device according to claim 11,
wherein a length of the fourth region of the oxide semiconductor in a channel length direction is more than or equal to 2 nm and less than or equal to 10 nm, and
wherein a length of the fifth region of the oxide semiconductor in the channel length direction is more than or equal to 2 nm and less than or equal to 10 nm.

### Claim 13 (depends on 12)

The semiconductor device according to claim 12,
wherein a length of the first conductor in the channel length direction is more than or equal to 4 nm and less than or equal to 30 nm.

### Claim 14 (depends on 8)

The semiconductor device according to claim 8,
wherein the first insulator comprises at least one of indium, an element M, and zinc, and
wherein the element M is titanium, gallium, yttrium, zirconium, lanthanum, cerium, neodymium, tin, or hafnium.

### Claim 15 (depends on 8)

The semiconductor device according to claim 8,
wherein the oxide semiconductor comprises indium, an element M, zinc, and oxygen, and
wherein the element M is titanium, gallium, yttrium, zirconium, lanthanum, cerium, neodymium, tin, or hafnium.
