# US 10,483,362 B2 · High electron mobility transistor devices and method for fabricating the same

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- Number: US 10,483,362 B2
- Document ID: US10483362B2
- Status: Granted
- Kind: B2
- Application number: 16/394,701
- Filed: 2019-04-25
- Published: 2019-08-15
- Granted: 2019-11-19
- Earliest claimed: 2017-10-03
- Assignees: Vanguard International Semiconductor Corporation
- Applicants: Vanguard International Semiconductor Corporation
- Inventors: Hsin-Chih Lin; Shin-Cheng Lin; Yung-Hao Lin
- Web page: https://patentgrep.com/patent/US10483362B2

## CPC

- H10D 64/256: {for lateral devices wherein the source or drain electrodes are recessed in semiconductor bodies (source or drain electrodes of TFTs H10D30/673)}
- H10D 30/015: {of FETs having heterojunction interface channels or heterojunction gate electrodes, e.g. HEMT}
- H10D 30/47: having two-dimensional [2D] charge carrier gas channels, e.g. nanoribbon FETs or high electron mobility transistors [HEMT]
- H10D 30/475: {having wider bandgap layer formed on top of lower bandgap active layer, e.g. undoped barrier HEMTs such as i-AlGaN/GaN HEMTs}
- H10D 62/824: comprising only Group III-V materials heterojunctions, e.g. GaN/AlGaN heterojunctions
- H10D 62/8503: {Nitride Group III-V materials, e.g. AlN or GaN}
- H10D 62/854: further characterised by the dopants
- H10D 64/0116: {to Group III-V semiconductors}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

A HEMT device is provided. The HEMT device includes a substrate, a buffer layer, a first epitaxial layer, a second epitaxial layer, an insulating layer, a gate, a source, a drain, a trench, and a metal layer. The buffer layer is formed on the substrate. The first epitaxial layer is formed on the buffer layer. The second epitaxial layer is formed on the first epitaxial layer. The insulating layer is formed on the second epitaxial layer. The gate is disposed in the insulating layer. The source and the drain are disposed in the insulating layer. The trench passes through the insulating layer and the second epitaxial layer, and extends into the first epitaxial layer. The metal layer is formed on the insulating layer to connect to the source, and is filled into the trench to electrically connect to the first epitaxial layer and the source.

## Claims

### Claim 1

A method for fabricating a high electron mobility transistor (HEMT) device, comprising:
providing a substrate;
forming a buffer layer on the substrate;
forming a first epitaxial layer on the buffer layer;
forming a second epitaxial layer on the first epitaxial layer;
forming an insulating layer on the second epitaxial layer;
disposing a gate in the insulating layer;
disposing a source and a drain in the insulating layer, wherein the source and the drain are located on both sides of the gate;
forming a trench to pass through the insulating layer and the second epitaxial layer, and to extend into the first epitaxial layer; and
forming a metal layer on the insulating layer to connect to the source, and to fill into the trench to electrically connect to the first epitaxial layer and the source, wherein an orthogonal projection of the metal layer onto the substrate does not overlap an orthogonal projection of the source onto the substrate.

### Claim 2 (depends on 1)

The method for fabricating a high electron mobility transistor (HEMT) device as claimed in claim 1, wherein the substrate is a silicon substrate or a sapphire substrate.

### Claim 3 (depends on 1)

The method for fabricating a high electron mobility transistor (HEMT) device as claimed in claim 1, wherein the buffer layer is a carbon-doped gallium nitride layer.

### Claim 4 (depends on 1)

The method for fabricating a high electron mobility transistor (HEMT) device as claimed in claim 1, wherein the first epitaxial layer is a gallium nitride layer.

### Claim 5 (depends on 1)

The method for fabricating a high electron mobility transistor (HEMT) device as claimed in claim 1, wherein the second epitaxial layer is a gallium aluminum nitride layer.

### Claim 6 (depends on 1)

The method for fabricating a high electron mobility transistor (HEMT) device as claimed in claim 1, wherein the insulating layer is a silicon oxide layer, a silicon nitride layer, or a silicon oxynitride layer.

### Claim 7 (depends on 1)

The method for fabricating a high electron mobility transistor (HEMT) device as claimed in claim 1, wherein the trench is etched to pass through the insulating layer, the second epitaxial layer, and the first epitaxial layer, and to extend into the buffer layer such that the metal layer is electrically connected to the buffer layer, the first epitaxial layer, and the source.

### Claim 8 (depends on 1)

The method for fabricating a high electron mobility transistor (HEMT) device as claimed in claim 1, wherein the trench is etched to pass through the insulating layer, the second epitaxial layer, the first epitaxial layer, and the buffer layer, and to extend into the substrate such that the metal layer is electrically connected to the substrate, the buffer layer, the first epitaxial layer, and the source.

### Claim 9 (depends on 7)

The method for fabricating a high electron mobility transistor (HEMT) device as claimed in claim 7, wherein the trench has a depth of 0.5-20 μm.

### Claim 10 (depends on 8)

The method for fabricating a high electron mobility transistor (HEMT) device as claimed in claim 8, wherein the trench has a depth of 0.5-20 μm.