# US 10,483,351 B2 · Method of manufacturing a substrate with reduced threading dislocation density

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- Number: US 10,483,351 B2
- Document ID: US10483351B2
- Status: Granted
- Kind: B2
- Application number: 15/757,057
- Filed: 2016-09-02
- Published: 2018-09-27
- Granted: 2019-11-19
- Earliest claimed: 2015-09-04
- Assignees: Nanyang Technological University; Massachusetts Institute of Technology
- Applicants: Nanyang Technological University; Massachusetts Institute of Technology
- Inventors: Kwang Hong Lee; Chuan Seng Tan; Eugene A. Fitzgerald; Shuyu Bao
- Web page: https://patentgrep.com/patent/US10483351B2

## CPC

- H10D 62/124: {Shapes, relative sizes or dispositions of the regions of semiconductor bodies or of junctions between the regions}
- C30B 25/10: Heating of the reaction chamber or the substrate
- C30B 29/08: Germanium
- H10P 14/24: using chemical vapour deposition [CVD]
- H10P 14/2905: {Silicon, silicon germanium or germanium}
- H10P 14/2926: {Crystal orientations}
- H10P 14/3211: {Silicon, silicon germanium or germanium}
- H10P 14/3411: {Silicon, silicon germanium or germanium}
- H10P 14/3442: {N-type}
- H10H 20/01335: {the light-emitting regions comprising nitride materials}
- H10P 95/906: {for altering the shape of semiconductors, e.g. smoothing the surface}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- C30B: SINGLE-CRYSTAL GROWTH (by using ultra-high pressure, e.g. for the formation of diamonds, B01J3/06); UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL (zone-refining of metals or alloys C22B); PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE (casting of metals, casting of other substances by the same processes or devices B22D; working of plastics B29; modifying the physical structure of metals or alloys C21D, C22F); SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE (for producing semiconductor devices or parts thereof H10); APPARATUS THEREFOR
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10H: INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS

## Abstract

A method of manufacturing a substrate with reduced threading dislocation density is disclosed, which comprises: (i) at a first temperature, forming a first layer of wafer material on a semiconductor substrate, the first layer arranged to be doped with a first concentration of at least one dopant that is different to the wafer material; and (ii) at a second temperature higher than the first temperature, forming a second layer of the wafer material on the first layer to obtain the substrate, the second layer arranged to be doped with a progressively decreasing concentration of the dopant during formation, the doping configured to be decreased from the first concentration to a second concentration. The wafer material and dopant are different to silicon. A related substrate is also disclosed.

## Claims

### Claim 1

A substrate with reduced threading dislocation density, comprising:
a semiconductor substrate;
a first germanium layer formed on the semiconductor substrate, the first germanium layer being doped with a first concentration of at least one dopant that is of a different material to the first germanium layer; and
a second germanium layer formed on the first germanium layer, the second germanium layer being doped with a second concentration of the at least one dopant, doped concentration of the at least one dopant in the second germanium layer being decreased progressively from the first concentration to the second concentration,
wherein the dopant is different to silicon.

### Claim 2 (depends on 1)

The substrate of claim 1, wherein the first and second germanium layers are collectively configured with a thickness of about 1.5 μm, and have an etch-pit density of less than 5×106/cm2.

### Claim 3 (depends on 2)

The substrate of claim 2, wherein the substrate has an RMS surface roughness of less than 0.50 nm.

### Claim 4 (depends on 1)

The substrate of claim 1, wherein the at least one dopant includes a group V semiconductor material.

### Claim 5 (depends on 4)

The substrate of claim 4, wherein the group V semiconductor material includes arsenic, or phosphorus.

### Claim 6 (depends on 1)

The substrate of claim 1, wherein the semiconductor substrate is a silicon substrate with 6° off-cut toward [110] direction.

### Claim 7 (depends on 1)

The substrate of claim 1, wherein the first concentration is between approximately 8×1018/cm3 to 1×1020/cm3.

### Claim 8 (depends on 1)

The substrate of claim 1, wherein the second concentration of the at least one dopant is substantially zero.