# US 10,483,293 B2 · Active matrix display device, and module and electronic appliance including the same > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,483,293 B2 - Document ID: US10483293B2 - Status: Granted - Kind: B2 - Application number: 14/628,657 - Filed: 2015-02-23 - Published: 2015-10-08 - Granted: 2019-11-19 - Earliest claimed: 2014-02-27 - Assignees: Semiconductor Energy Laboratory Co., Ltd. - Applicants: Semiconductor Energy Laboratory Co., Ltd. - Inventors: Hiroyuki Miyake - Web page: https://patentgrep.com/patent/US10483293B2 ## CPC - H10D 86/60: wherein the TFTs are in active matrices - G09G 3/3233: with pixel circuitry controlling the current through the light-emitting element - G09G 3/3266: Details of drivers for scan electrodes - G09G 3/3291: in which the data driver supplies a variable data voltage for setting the current through, or the voltage across, the light-emitting elements - H10D 30/6734: {having gate electrodes arranged on both top and bottom sides of the channel, e.g. dual-gate TFTs} - H10D 86/423: {comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO} - H10D 86/441: {Interconnections, e.g. scanning lines} - H10D 86/471: {having different architectures, e.g. having both top-gate and bottom-gate TFTs} - H10D 86/481: {integrated with passive devices, e.g. auxiliary capacitors} - H10H 20/8312: {extending at least partially through the bodies} - H10H 20/857: Interconnections, e.g. lead-frames, bond wires or solder balls - G09G 2300/0819: used for counteracting undesired variations, e.g. feedback or autozeroing - G09G 2300/0842: forming a memory circuit, e.g. a dynamic memory with one capacitor - G09G 2300/0861: with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes - G09G 2310/0248: Precharge or discharge of column electrodes before or after applying exact column voltages - G09G 2310/0286: Details of a shift registers arranged for use in a driving circuit - G09G 2310/0297: Special arrangements with multiplexing or demultiplexing of display data in the drivers for data electrodes, in a pre-processing circuitry delivering display data to said drivers or in the matrix panel, e.g. multiplexing plural data signals to one D/A converter or demultiplexing the D/A converter output to multiple columns - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES - G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00) - H10H: INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS ## Abstract First to fourth switches are provided so that conduction states are able to be controlled independently of each other. The first switch, the third switch, and the second switch are electrically connected in series between a first wiring and a third wiring. The fourth switch has a function of controlling a conduction state between the light-emitting element and a fourth wiring. In a first transistor, a gate is electrically connected to a node to which the third switch and the second switch are electrically connected, one of a source and a drain is electrically connected to a second wiring, and the other is electrically connected to the light-emitting element. A capacitor includes first and second electrodes, the first electrode is electrically connected to a node to which the first switch and the third switch are electrically connected, and the second electrode is electrically connected to the light-emitting element. ## Claims ### Claim 1 A semiconductor device comprising: first to fifth transistors; a first capacitor comprising first and second electrodes; a pixel electrode; first to third gate wirings; and first to fourth wirings, wherein the second transistor, the fourth transistor, and the third transistor are electrically connected in series between the first wiring and the third wiring; wherein the first electrode is electrically connected to a first node to which the second transistor and the fourth transistor are electrically connected, wherein one of a source and a drain of the fifth transistor is electrically connected to the fourth wiring, wherein the second electrode is electrically connected to the pixel electrode, wherein a gate of the first transistor is electrically connected to a second node to which the fourth transistor and the third transistor are electrically connected, wherein one of a source and a drain of the first transistor is electrically connected to the second wiring, wherein the other of the source and the drain of the first transistor is electrically connected to the pixel electrode and the other of the source and the drain of the fifth transistor, wherein the first gate wiring is electrically connected to a gate of the second transistor, wherein the second gate wiring is electrically connected to a gate of the third transistor; wherein the third gate wiring is electrically connected to a gate of the fourth transistor, wherein the first gate wiring is not electrically connected t second gate wiring, and wherein the third gate wiring is not electrically connected to the first gate wiring and the second gate wiring. ### Claim 2 (depends on 1) The semiconductor device according to claim 1, wherein the first to fifth transistors are n-channel transistors. ### Claim 3 (depends on 1) The semiconductor device according to claim 1, wherein the first to fifth transistors comprises an oxide semiconductor layer including a region in which a channel is formed. ### Claim 4 (depends on 1) A module comprising: the semiconductor device according to claim 1; and at least one of a touch sensor or a circuit board. ### Claim 5 (depends on 1) An electronic appliance comprising: the semiconductor device according to claim 1; and at least one of a housing, a microphone, a speaker, or an operation key. ### Claim 6 A semiconductor device comprising: first to fifth transistors; a first light-emitting element; a first capacitor comprising first and second electrodes; first to third gate wirings; and first to fourth wirings, wherein the second transistor, the fourth transistor, and the third transistor are electrically connected in series between the first wiring and the third wiring, wherein the first electrode is electrically connected to a first node to which the second transistor and the fourth transistor are electrically connected, wherein one of a source and a drain of the fifth transistor is electrically connected to the fourth wiring, wherein the second electrode is electrically connected to the first light-emitting element, wherein a gate of the first transistor is electrically connected to a second node to which the fourth transistor and the third transistor are electrically connected, wherein one of a source and a drain of the first transistor is electrically connected to the second wiring, wherein the other of the source and the drain of the first transistor is electrically connected to the first light-emitting element and the other of the source and the drain of the fifth transistor, wherein the first gate wiring is electrically connected to a gate of the second transistor, wherein the second gate wiring is electrically connected to a gate of the third transistor, wherein the third gate wiring is electrically connected to a gate of the fourth transistor, wherein the first gate wiring is not electrically connected to the second gate wiring, and wherein the third gate wiring is not electrically connected to the first gate wiring and the second gate wiring. ### Claim 7 (depends on 6) The semiconductor device according to claim 6, wherein the first to fifth transistors are n-channel transistors. ### Claim 8 (depends on 6) The semiconductor device according to claim 6, wherein the first to fifth transistors comprises an oxide semiconductor layer including a region in which a channel is formed. ### Claim 9 (depends on 6) A module comprising: the semiconductor device according to claim 6; and at least one of a touch sensor or a circuit board. ### Claim 10 (depends on 6) An electronic appliance comprising: the semiconductor device according to claim 6; and at least one of a housing, a microphone, a speaker, or an operation key.