# US 10,483,290 B2 · Semiconductor device and manufacturing method thereof

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- Number: US 10,483,290 B2
- Document ID: US10483290B2
- Status: Granted
- Kind: B2
- Application number: 16/259,121
- Filed: 2019-01-28
- Published: 2019-05-23
- Granted: 2019-11-19
- Earliest claimed: 2008-12-25
- Assignees: Semiconductor Energy Laboratory Co., Ltd.
- Applicants: Semiconductor Energy Laboratory Co., Ltd.
- Inventors: Shunpei Yamazaki
- Web page: https://patentgrep.com/patent/US10483290B2

## CPC

- H10D 86/60: wherein the TFTs are in active matrices
- H10D 30/6755: {Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate}
- H10D 86/0231: {using masks, e.g. half-tone masks}
- H10D 86/40: characterised by multiple TFTs
- H10D 86/423: {comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO}
- H10D 86/441: {Interconnections, e.g. scanning lines}
- H10D 86/451: {characterised by the compositions or shapes of the interlayer dielectrics}
- H10D 99/00: Subject matter not provided for in other groups of this subclass
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

An object is to reduce a capacitance value of parasitic capacitance without decreasing driving capability of a transistor in a semiconductor device such as an active matrix display device. Further, another object is to provide a semiconductor device in which the capacitance value of the parasitic capacitance was reduced, at low cost. An insulating layer other than a gate insulating layer is provided between a wiring which is formed of the same material layer as a gate electrode of the transistor and a wiring which is formed of the same material layer as a source electrode or a drain electrode.

## Claims

### Claim 1

A semiconductor device comprising a pixel portion, the pixel portion comprising:
a transistor comprising:
a first conductive layer;
a first insulating layer over the first conductive layer;
an oxide semiconductor layer comprising In, Ga, and Zn over the first insulating layer; and
a second conductive layer and a third conductive layer each electrically connected to the oxide semiconductor layer; and
a pixel electrode electrically connected to the transistor,
wherein the first conductive layer serves as a gate electrode of the transistor and a gate wiring,
wherein the second conductive layer serves as one of a source electrode and a drain electrode of the transistor and a source wiring,
wherein the third conductive layer serves as the other of the source electrode and the drain electrode of the transistor,
wherein the first conductive layer and the second conductive layer intersect with each other in a cross shape and overlap each other in a first region,
wherein a first transparent conductive layer comprising In, Zn, and oxygen overlaps the first region, and
wherein a width of a region of the first conductive layer not overlapping with the first region and not overlapping with the oxide semiconductor layer is different from a width of the first conductive layer in the first region.

### Claim 2

A semiconductor device comprising a pixel portion, the pixel portion comprising:
a transistor comprising:
a first conductive layer;
a first insulating layer over the first conductive layer;
an oxide semiconductor layer comprising In, Ga, and Zn over the first insulating layer; and
a second conductive layer and a third conductive layer each electrically connected to the oxide semiconductor layer;
a pixel electrode electrically connected to the transistor; and
a liquid crystal layer over the pixel electrode,
wherein the first conductive layer serves as a gate electrode of the transistor and a gate wiring,
wherein the second conductive layer serves as one of a source electrode and a drain electrode of the transistor and a source wiring,
wherein the third conductive layer serves as the other of the source electrode and the drain electrode of the transistor,
wherein the first conductive layer and the second conductive layer intersect with each other in a cross shape and overlap each other in a first region,
wherein a first transparent conductive layer comprising In, Zn, and oxygen overlaps the first region, and
wherein a width of a region of the first conductive layer not overlapping with the first region and not overlapping with the oxide semiconductor layer is different from a width of the first conductive layer in the first region.