# US 10,483,278 B2 · Nonvolatile memory devices and methods forming the same > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,483,278 B2 - Document ID: US10483278B2 - Status: Granted - Kind: B2 - Application number: 15/676,011 - Filed: 2017-08-14 - Published: 2018-01-18 - Granted: 2019-11-19 - Earliest claimed: 2010-10-05 - Assignees: Samsung Electronics Co., Ltd. - Applicants: Samsung Electronics Co., Ltd. - Inventors: Changhyun Lee; Byoungkeun Son - Web page: https://patentgrep.com/patent/US10483278B2 ## CPC - H10W 72/00: Interconnections or connectors in packages - G11C 16/0408: {comprising cells containing floating gate transistors (G11C16/0483, G11C16/0491 take precedence)} - G11C 16/0483: {comprising cells having several storage transistors connected in series} - H10B 41/27: the channels comprising vertical portions, e.g. U-shaped channels - H10B 43/27: the channels comprising vertical portions, e.g. U-shaped channels - H10D 64/013: {of electrodes having a conductor capacitively coupled to a semiconductor by an insulator} - H10B 41/35: with a cell select transistor, e.g. NAND - H10B 43/35: with cell select transistors, e.g. NAND - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 - G11C: STATIC STORES (semiconductor memory devices H10B) - H10B: ELECTRONIC MEMORY DEVICES - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES ## Abstract Provided are nonvolatile memory devices and methods of forming the same. The nonvolatile memory device includes a plurality of word lines, a ground select line, string select line, and a dummy word line. Each of distances between the dummy word line and the ground select line and between the dummy word line and the word line is greater than a distance between a pair of the word lines adjacent to each other. ## Claims ### Claim 1 A nonvolatile memory device comprising: a substrate; a ground select line on the substrate; a plurality of word lines vertically stacked on the ground select line; a string select line on the plurality of word lines; a first dummy word line between the ground select line and a first word line, wherein the first word line is nearest to the ground select line among the plurality of word lines; and a second dummy word line between the string select line and a second word line, wherein the second word line is nearest to the string select line among the plurality of word lines, wherein a first distance between a bottom surface of the ground select line and a bottom surface of the first dummy word line is greater than a second distance between the bottom surface of the first dummy word line and a bottom surface of the first word line, wherein a third distance between bottom surfaces of adjacent ones of the plurality of word lines is less than the second distance, and wherein the ground select line, the first dummy word line, the plurality of word lines, the second dummy word line and the string select line have the same thickness. ### Claim 2 (depends on 1) The nonvolatile memory device of claim 1, wherein a bottom surface of the second dummy word line is vertically spaced apart from a bottom surface of the second word line by a fourth distance, and wherein the fourth distance is greater than the third distance and is less than the first distance. ### Claim 3 (depends on 1) The nonvolatile memory device of claim 1, wherein a bottom surface of the string select line is vertically spaced apart from a bottom surface of the second dummy word line by a fifth distance, and wherein the fifth distance is greater than the second distance and the third distance. ### Claim 4 (depends on 1) The nonvolatile memory device of claim 1, wherein each of the ground and string select lines has the same thickness as a thickness of each of the plurality of word lines. ### Claim 5 (depends on 1) The nonvolatile memory device of claim 1, wherein each of the first and second dummy word lines has the same thickness as a thickness of each of the plurality of word lines. ### Claim 6 (depends on 1) The nonvolatile memory device of claim 1, further comprising: a semiconductor pattern disposed on sidewalls of the ground select line, the first dummy word line, the plurality of word lines, the second dummy word line, and the string select line; and a data storage layer disposed between the semiconductor pattern and the ground select line, the first dummy word line, the plurality of word lines, the second dummy word line, and the string select line. ### Claim 7 (depends on 6) The nonvolatile memory device of claim 6, wherein the data storage layer extends onto top surfaces and bottom surfaces of the ground select line, the first dummy word line, the plurality of word lines, the second dummy word line, and the string select line. ### Claim 8 (depends on 6) The nonvolatile memory device of claim 6, wherein the data storage layer includes a charge trapping layer. ### Claim 9 A nonvolatile memory device comprising: a substrate; and first to fourth gate patterns sequentially stacked in a first direction perpendicular to a top surface of the substrate, wherein a first distance between a bottom surface of the first gate pattern and a bottom surface of the second gate pattern is greater than a second distance between the bottom surface of the second gate pattern and a bottom surface of the third gate pattern, wherein a third distance between the bottom surface of the third gate pattern and a bottom surface of the fourth gate pattern is less than the second distance, and wherein the first to fourth gate patterns have the same thickness. ### Claim 10 (depends on 9) The nonvolatile memory device of claim 9, further comprising a plurality of fifth gate patterns stacked on the fourth gate pattern, wherein a bottommost one of the plurality of fifth gate patterns is spaced apart from the fourth gate pattern by the third distance in the first direction, and wherein each of the plurality of fifth gate patterns are spaced apart from immediately neighboring ones of the plurality of fifth gate patterns by the third distance in the first direction. ### Claim 11 (depends on 9) The nonvolatile memory device of claim 9, further comprising: semiconductor patterns penetrating the first to fourth gate patterns in the first direction; and a data storage layer disposed between the semiconductor patterns and the first to fourth gate patterns. ### Claim 12 (depends on 11) The nonvolatile memory device of claim 11, wherein the data storage layer includes a charge trapping layer. ### Claim 13 (depends on 11) The nonvolatile memory device of claim 11, wherein the data storage layer extends onto top surfaces and bottom surfaces of the first to fourth gate patterns.