# US 10,483,250 B2 · Three-dimensional small form factor system in package architecture

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- Number: US 10,483,250 B2
- Document ID: US10483250B2
- Status: Granted
- Kind: B2
- Application number: 15/765,992
- Filed: 2015-11-04
- Published: 2018-10-04
- Granted: 2019-11-19
- Earliest claimed: 2015-11-04
- Assignees: Intel Corporation
- Applicants: Intel Corporation
- Inventors: Vijay K. Nair; Adel A. Elsherbini; Lakshman Krishnamurthy; Johanna M. Swan; Alexander Essaian; Torrey W. Frank
- Web page: https://patentgrep.com/patent/US10483250B2

## CPC

- H10W 90/00: Package configurations
- H10W 70/09: extending onto an encapsulation that laterally surrounds the chip or wafer, e.g. fan-out wafer level package [FOWLP] RDLs
- H10W 70/60: Insulating or insulated package substrates; Interposers; Redistribution layers (leadframes H10W70/40)
- H10W 70/611: {for connecting multiple chips together}
- H10W 72/00: Interconnections or connectors in packages
- H10W 72/0198: {batch processes}
- H10W 90/401: {characterised by multiple insulating or insulated package substrates, interposers or RDLs}
- H10W 44/248: {for antennas}
- H10W 70/614: {the multiple chips being integrally enclosed}
- H10W 72/241: {Dispositions, e.g. layouts}
- H10W 72/853: {On the same surface}
- H10W 72/874: {On different surfaces}
- H10W 72/9413: {on encapsulations}
- H10W 74/019: {using temporary auxiliary substrates (H10W74/017 takes precedence)}
- H10W 74/142: {the encapsulations exposing the passive side of the semiconductor body}
- H10W 90/10: Configurations of laterally-adjacent chips
- H10W 90/22: the stacked chips being on both top and bottom sides of a package substrate, interposer or RDL
- H10W 90/701: {characterised by the relative positions of pads or connectors relative to package parts}
- H10W 90/722: {between stacked chips}
- H10W 90/724: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

Embodiments are generally directed to three-dimensional small form factor system in package architecture. An embodiment of an apparatus includes a first package having a first side and an opposite second side, the first package including a plurality of embedded electronic components and one or more embedded via bars, each via bar including a plurality of through vias; and a second package having a first side and an opposite second side, the second package including a plurality of embedded electronic components, wherein a first side of the first package and a second side of second package are coupled together by a plurality of connections, including at least a first connection connecting the second package to a first component of the first package and a second connection connecting the second package to a first via bar of the one or more via bars.

## Claims

### Claim 1

An apparatus comprising:
a first package having a first side and an opposite second side, the first package including:
a plurality of embedded electronic components, ones of the plurality of embedded electronic components laterally adjacent to one another, and
one or more embedded via bars, each via bar including a plurality of through vias;
and
a second package having a first side and an opposite second side, the second package including:
a plurality of embedded electronic components, ones of the plurality of embedded electronic components laterally adjacent to one another;
wherein a first side of the first package and a second side of second package are coupled together by a plurality of connections, including at least a first connection connecting the second package to a first component of the first package and a second connection connecting one of the plurality of embedded electronic components of the second package to a first via bar of the one or more embedded via bars, wherein the one of the plurality of embedded electronic components of the second package is directly over the first via bar of the one of the one or more embedded via bars of the first package.

### Claim 2 (depends on 1)

The apparatus of claim 1, wherein the plurality of embedded electronic components for each of the first package and the second package includes one or more of any of the following:
packaged components;
active or integrated circuit components; or
passive components.

### Claim 3 (depends on 1)

The apparatus of claim 1, wherein the first side of the first package and the second package is a top side, and wherein the second side of the first package and the second package is a bottom side.

### Claim 4 (depends on 1)

The apparatus of claim 1, further comprising a hanging die coupled with the second side of the first package.

### Claim 5 (depends on 4)

The apparatus of claim 4, further comprising a ball grid array (BGA) coupled to the second side of the first package, wherein a diameter of each ball of the BGA is greater than a height of the hanging die.

### Claim 6 (depends on 5)

The apparatus of claim 5, wherein the first package is coupled with a surface of a motherboard by the BGA.

### Claim 7 (depends on 6)

The apparatus of claim 6, wherein a first side of the hanging die is coupled with the second side of the first package, and wherein there is a gap between a second side of the hanging die, the second side of the hanging die being opposite to the first side of the hanging die, such that the hanging die is not in contact with the surface of the motherboard.

### Claim 8 (depends on 1)

The apparatus of claim 1, wherein a height of a first component of the first package is the same as a height of the one or more via bars.

### Claim 9 (depends on 1)

The apparatus of claim 1, wherein the first package includes two or more embedded radio frequency (RF) components, the RF components being adjacent to each other in the first package.

### Claim 10 (depends on 1)

The apparatus of claim 1, wherein the apparatus comprises a three-dimensional system in package (SiP).

### Claim 11

An electronic device comprising:
a stacked system in package (SiP), the stacked system in package including:
a first package including a plurality of embedded electronic components and one or more via bars, ones of the plurality of embedded electronic components laterally adjacent to one another, each via bar including a plurality of through vias, the first package having a first side and an opposite second side, and
a second package including a plurality of embedded electronic components, ones of the plurality of embedded electronic components laterally adjacent to one another, the second package having a first side and an opposite second side; and
a main printed circuit board (PCB), the first package being coupled with the main PCB;
wherein the stacked system in package includes a receiver, a transmitter, or both, and wherein the electronic device includes one or more antennas including a dipole antenna for the transmission of data; and
wherein a first side of the first package and a second side of second package are coupled together by a plurality of connections, including at least a first connection connecting the second package to a first component of the first package and a second connection connecting one of the plurality of embedded electronic components of the second package to a first via bar of the one or more via bars, wherein the one of the plurality of embedded electronic components of the second package is directly over the first via bar of the one of the one or more embedded via bars of the first package.

### Claim 12 (depends on 11)

The electronic device of claim 11, wherein the plurality of embedded electronic components for each of the first package and the second package includes one or more of any of the following:
packaged components;
active or integrated circuit components; or
passive components.

### Claim 13 (depends on 11)

The electronic device of claim 11, further comprising a hanging die coupled with the second side of the first package.

### Claim 14 (depends on 13)

The electronic device of claim 13, further comprising a ball grid array (BGA) coupled to the second side of the first package, wherein a diameter of each ball of the BGA is greater than a height of the hanging die, and wherein the first package is coupled with the main PCB by the BGA.

### Claim 15 (depends on 11)

The electronic device of claim 11, wherein a height of a first component of the first package is the same as a height of the one or more via bars.

### Claim 16 (depends on 11)

The electronic device of claim 11, wherein the electronic device is a mobile electronic device.

### Claim 17 (depends on 16)

The electronic device of claim 16, wherein the electronic device is a wearable electronic device.

### Claim 18

A method comprising:
placing a plurality of electronic components and one or more via bars on a mold carrier to form a wafer for a first package, ones of the plurality of embedded electronic components laterally adjacent to one another;
overmolding the wafer for the first package to embed the electronic components and one or more via bars using a mold compound;
releasing the mold carrier for the first package;
thinning the mold compound of the wafer of the first package to expose connections of the via bars and a first electronic component on a top side of the first package; and
applying a second package on the connections of the first electronic component and the via bars of the first package to form a stacked package, the second package comprising a plurality of embedded electronic components, ones of the plurality of embedded electronic components laterally adjacent to one another, wherein one of the plurality of embedded electronic components of the second package is directly over and connected to one of the one or more via bars of the first package.

### Claim 19 (depends on 18)

The method of claim 18, wherein placing the plurality of electronic components includes placing one or more of any of the following:
packaged components;
active or integrated circuit components; or
passive components.

### Claim 20 (depends on 18)

The method of claim 18, wherein a height of the first component of the first package is the same as a height of the one or more via bars of the first package.

### Claim 21 (depends on 18)

The method of claim 18, further comprising applying a dielectric die layer and redistribution layer (RDL) on the bottom side of the first package.

### Claim 22 (depends on 21)

The method of claim 21, further comprising optionally applying a dielectric layer and RDL layer on a top side of the first package.

### Claim 23 (depends on 18)

The method of claim 18, further comprising coupling the first package with a motherboard.

### Claim 24 (depends on 23)

The method of claim 23, further comprising coupling a hanging die with the bottom side of the first package.

### Claim 25 (depends on 24)

The method of claim 24, wherein coupling the hanging die with the bottom side of the first package includes maintaining a gap between the hanging die and the motherboard such that the banging die is not in contact with a surface of the motherboard.