# US 10,483,248 B2 · Wafer level chip scale filter packaging using semiconductor wafers with through wafer vias

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- Number: US 10,483,248 B2
- Document ID: US10483248B2
- Status: Granted
- Kind: B2
- Application number: 15/912,924
- Filed: 2018-03-06
- Published: 2018-09-27
- Granted: 2019-11-19
- Earliest claimed: 2017-03-23
- Assignees: Skyworks Solutions, Inc.
- Applicants: Skyworks Solutions, Inc.
- Inventors: Jiro Yota; Hong Shen; Viswanathan Ramanathan
- Web page: https://patentgrep.com/patent/US10483248B2

## CPC

- H10W 90/00: Package configurations
- H03H 3/02: for the manufacture of piezoelectric or electrostrictive resonators or networks (H03H3/08 takes precedence)
- H03H 3/08: for the manufacture of resonators or networks using surface acoustic waves
- H03H 9/0547: {consisting of a vertical arrangement (H03H9/0566 takes precedence)}
- H03H 9/1007: {for bulk acoustic wave [BAW] devices}
- H03H 9/1064: {for surface acoustic wave [SAW] devices}
- H03H 9/64: using surface acoustic waves
- H10N 30/875: {Further connection or lead arrangements, e.g. flexible wiring boards, terminal pins}
- H10P 50/642: {Chemical etching}
- H10P 72/74: {using temporarily an auxiliary support}
- H10W 20/0234: {comprising etching via holes that stop on pads or on electrodes}
- H10W 20/0242: {comprising etching via holes from the back sides of the chips, wafers or substrates}
- H10W 20/20: Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
- H10W 42/00: Arrangements for protection of devices (arrangements for thermal protection H10W40/00)
- H10W 72/00: Interconnections or connectors in packages
- H10W 72/90: Bond pads, in general
- H10W 74/129: {forming a chip-scale package [CSP]}
- H10W 74/137: {the encapsulations being directly on the semiconductor body (H10W74/134 takes precedence)}
- H10W 76/17: characterised by their materials
- H03H 9/0004: {Impedance-matching networks (H03H9/145 takes precedence)}
- H03H 9/02559: {of lithium niobate or lithium-tantalate substrates}
- H10D 1/20: Inductors
- H10D 1/68: Capacitors having no potential barriers
- H10D 8/00: Diodes (variable-capacitance diodes H10D1/64; gated diodes H10D12/00)
- H10N 30/08: Shaping or machining of piezoelectric or electrostrictive bodies
- H10N 30/8548: {Lead-based oxides}
- H10N 30/8554: {Lead-zirconium titanate [PZT] based}
- H10P 54/00: Cutting or separating of wafers, substrates or parts of devices
- H10P 72/7416: {used during dicing or grinding}
- H10P 72/7422: {used to protect an active side of a device or wafer}
- H10P 72/744: {Details of chemical or physical process used for separating the auxiliary support from a device or a wafer}
- H10W 20/023: {the interconnections being through-semiconductor vias}
- H10W 44/20: at high-frequency [HF] or radio frequency [RF]
- H10W 44/216: {Waveguides, e.g. strip lines}
- H10W 90/792: {between multiple chips}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H03H: IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS (waveguides, resonators, lines or other devices of the waveguide type H01P)
- H10N: ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

An electronics package includes a semiconductor substrate having one or more passive devices formed thereon and a cavity defined in a first surface thereof. A piezoelectric substrate is bonded to the semiconductor substrate and has a radio frequency (RF) filter formed thereon. The RF filter is disposed within the cavity defined in the semiconductor substrate.

## Claims

### Claim 1

An electronics package comprising:
a semiconductor substrate having one or more passive devices formed on the semiconductor substrate and a cavity defined in a first surface of the semiconductor substrate; and
a piezoelectric substrate bonded to the semiconductor substrate and having a microelectromechanical device formed on the piezoelectric substrate, the microelectromechanical device disposed within the cavity defined in the semiconductor substrate.

### Claim 2 (depends on 1)

The package of claim 1 wherein the one or more passive devices are disposed within the cavity.

### Claim 3 (depends on 1)

The package of claim 1 wherein the microelectromechanical device is one of a surface acoustic wave filter and a bulk acoustic wave filter.

### Claim 4 (depends on 1)

The package of claim 1 wherein the semiconductor substrate includes a plurality of bond pads formed on a second surface of the semiconductor substrate.

### Claim 5 (depends on 4)

The package of claim 4 wherein the piezoelectric substrate includes one or more bond pads electrically connected to one or more of the plurality of bond pads formed on the second surface of the semiconductor substrate.

### Claim 6 (depends on 5)

The package of claim 5 wherein the one or more bond pads of the piezoelectric substrate are electrically connected to the one or more of the plurality of bond pads formed on the second surface of the semiconductor substrate by through-wafer vias passing through the semiconductor substrate.

### Claim 7 (depends on 1)

The package of claim 1 configured as a flip-chip package.

### Claim 8 (depends on 1)

The package of claim 1 wherein the one or more passive devices are disposed on a second surface of the semiconductor substrate opposite the first surface.

### Claim 9 (depends on 8)

The package of claim 8 wherein the semiconductor substrate includes a plurality of bond pads formed on the second surface thereof.

### Claim 10 (depends on 1)

The package of claim 1 further including a seal ring hermetically sealing the cavity.

### Claim 11 (depends on 1)

The package of claim 1 wherein side walls and an upper wall of the cavity are coated with a metal film.

### Claim 12 (depends on 1)

The package of claim 1 wherein the semiconductor substrate is free of microelectromechanical system (MEMS) devices.

### Claim 13 (depends on 1)

The package of claim 1 further comprising a passivation film disposed on the semiconductor substrate and one or more passive devices.

### Claim 14

A module for an electronic device including an electronics package, the electronics package comprising:
a semiconductor substrate having one or more passive devices formed on the semiconductor substrate and a cavity defined in a first surface of the semiconductor substrate; and
a piezoelectric substrate bonded to the semiconductor substrate and having a microelectromechanical device formed on the piezoelectric substrate, the microelectromechanical device disposed within the cavity defined in the semiconductor substrate.

### Claim 15 (depends on 14)

The module of claim 14 wherein the one or more passive devices are disposed within the cavity.

### Claim 16 (depends on 14)

The module of claim 14 wherein the microelectromechanical device is one of a surface acoustic wave filter and a bulk acoustic wave filter.

### Claim 17 (depends on 14)

The module of claim 14 wherein the one or more passive devices are disposed on a second surface of the semiconductor substrate opposite the first surface.

### Claim 18 (depends on 14)

The module of claim 14 wherein side walls and an upper wall of the cavity are coated with a metal film.

### Claim 19

An electronic device including a module for an electronic device, the module including an electronics package, the electronics package comprising:
a semiconductor substrate having one or more passive devices formed on the semiconductor substrate and a cavity defined in a first surface of the semiconductor substrate; and
a piezoelectric substrate bonded to the semiconductor substrate and having a microelectromechanical device formed on the piezoelectric substrate, the microelectromechanical device disposed within the cavity defined in the semiconductor substrate.

### Claim 20 (depends on 19)

The electronic device of claim 19 wherein the one or more passive devices are disposed within the cavity.

### Claim 21 (depends on 19)

The electronic device of claim 19 wherein the microelectromechanical device is one of a surface acoustic wave filter and a bulk acoustic wave filter.

### Claim 22 (depends on 19)

The electronic device of claim 19 wherein the one or more passive devices are disposed on a second surface of the semiconductor substrate opposite the first surface.