# US 10,483,240 B2 · Semiconductor device and method for manufacturing the same

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- Number: US 10,483,240 B2
- Document ID: US10483240B2
- Status: Granted
- Kind: B2
- Application number: 15/949,446
- Filed: 2018-04-10
- Published: 2018-08-09
- Granted: 2019-11-19
- Earliest claimed: 2014-09-03
- Assignees: Tohoku University; Toshiba Memory Corporation
- Applicants: Tohoku University; Toshiba Memory Corporation
- Inventors: Mitsumasa Koyanagi; Tetsu Tanaka; Takafumi Fukushima; Kang-Wook Lee
- Web page: https://patentgrep.com/patent/US10483240B2

## CPC

- H10W 90/00: Package configurations
- H10W 20/023: {the interconnections being through-semiconductor vias}
- H10W 20/0234: {comprising etching via holes that stop on pads or on electrodes}
- H10W 20/0242: {comprising etching via holes from the back sides of the chips, wafers or substrates}
- H10W 20/0245: {comprising use of blind vias during the manufacture}
- H10W 20/0261: {characterised by the filling method or the material of the conductive fill}
- H10W 20/0265: {characterised by the sidewall insulation}
- H10W 20/20: Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
- H10W 20/40: Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
- H10W 72/20: Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W 46/00: Marks applied to devices, e.g. for alignment or identification
- H10W 72/01208: {using permanent auxiliary members, e.g. using solder flow barriers, spacers or alignment marks}
- H10W 72/01223: {in liquid form, e.g. by dispensing droplets or by screen printing}
- H10W 72/01265: {Thermally treating (reflowing H10W72/01257)}
- H10W 72/0198: {batch processes}
- H10W 72/072: {of bump connectors}
- H10W 72/07227: {involving guiding structures, e.g. spacers or supporting members}
- H10W 72/073: {of die-attach connectors}
- H10W 72/07331: {Connecting techniques}
- H10W 72/07341: {Controlling the bonding environment, e.g. atmosphere composition or temperature}
- H10W 72/241: {Dispositions, e.g. layouts}
- H10W 72/244: {relative to underlying supporting features, e.g. bond pads, RDLs or vias}
- H10W 72/29: Bond pads specially adapted therefor
- H10W 72/325: {Die-attach connectors having a filler embedded in a matrix}
- H10W 72/352: {comprising metals or metalloids, e.g. solders}
- H10W 72/354: {comprising polymers}
- H10W 72/59: Bond pads specially adapted therefor
- H10W 72/923: {Bond pads having multiple stacked layers}
- H10W 72/9415: {relative to the surface, e.g. recessed, protruding}
- H10W 72/942: {relative to underlying supporting features, e.g. bond pads, RDLs or vias}
- H10W 72/944: {Dispositions of multiple bond pads}
- H10W 72/952: {comprising metals or metalloids, e.g. PbSn, Ag or Cu}
- H10W 90/24: at least one of the stacked chips being laterally offset from a neighbouring stacked chip, e.g. chip stacks having a staircase shape
- H10W 90/26: the stacked chips being of the same size without any chips being laterally offset, e.g. chip stacks having a rectangular shape
- H10W 90/297: {characterised by the through-semiconductor vias [TSVs] in the stacked chips}
- H10W 90/722: {between stacked chips}
- H10W 90/732: {between stacked chips}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

A semiconductor device includes a metal column that extends in a stretching direction; a polymer layer that surrounds the metal column from a direction crossing the stretching direction; and a guide that surrounds the polymer layer in the crossing direction so as to be spaced from the metal column with the polymer layer interposed therebetween. A method for manufacturing semiconductor devices includes a step of filling a mixture containing metal particles and polymers in a guide; and a step of subjecting the mixture to a heat treatment so that the polymers agglomerate to the guide to form a polymer layer that makes contact with the guide and the metal particles agglomerate away from the guide with the polymer layer interposed therebetween to form a metal column that stretches in a stretching direction of the guide from the metal particles.

## Claims

### Claim 1

A method for manufacturing semiconductor devices comprising:
a step of filling a mixture containing metal particles and polymers in a guide; and
a step of subjecting the mixture to a heat treatment so that the polymers agglomerate to the guide to form a polymer layer that makes contact with the guide and the metal particles agglomerate away from the guide with the polymer layer interposed therebetween to form a metal column that stretches in a stretching direction of the guide from the metal particles, wherein
a pair of the guides is provided so as to extend in a horizontal direction, and
the mixture is filled between the guide and a heat treatment is performed whereby the polymer layer that makes contact with the guides is formed and the metal column that stretches in a horizontal direction is formed so as to be spaced from the guides with the polymer layer interposed therebetween.

### Claim 2 (depends on 1)

The method for manufacturing semiconductor devices according to claim 1, wherein
the step of subjecting the mixture to the heat treatment is a step of subjecting the mixture to a heat treatment at a higher temperature than a melting point of the polymers.

### Claim 3

A method for manufacturing semiconductor devices comprising:
a step of filling a mixture containing metal particles and polymers in a guide; and
a step of subjecting the mixture to a heat treatment so that the polymers agglomerate to the guide to form a polymer layer that makes contact with the guide and the metal particles agglomerate away from the guide with the polymer layer interposed therebetween to form a metal column that stretches in a stretching direction of the guide from the metal particles, wherein
the guide is hydrophilic, and
the polymers include at least hydrophilic polymers.

### Claim 4 (depends on 3)

The method for manufacturing semiconductor devices according to claim 3, wherein
the polymers include hydrophilic polymers and hydrophobic polymers, and
in the step of subjecting the mixture to the heat treatment, the hydrophilic polymers agglomerate to the guide and the hydrophobic polymers agglomerate away from the guide.

### Claim 5 (depends on 3)

The method for manufacturing semiconductor devices according to claim 3, wherein
the step of subjecting the mixture to the heat treatment is a step of subjecting the mixture to a heat treatment at a higher temperature than a melting point of the polymers.

### Claim 6

A method for manufacturing semiconductor devices comprising:
a step of filling a mixture containing metal particles and polymers in a guide; and
a step of subjecting the mixture to a heat treatment so that the polymers agglomerate to the guide to form a polymer layer that makes contact with the guide and the metal particles agglomerate away from the guide with the polymer layer interposed therebetween to form a metal column that stretches in a stretching direction of the guide from the metal particles, wherein
the guide is hydrophobic, and
the polymers include at least hydrophobic polymers.

### Claim 7 (depends on 6)

The method for manufacturing semiconductor devices according to claim 6, wherein
the polymers include hydrophilic polymers and hydrophobic polymers, and
in the step of subjecting the mixture to the heat treatment, the hydrophobic polymers agglomerate to the guide and the hydrophilic polymers agglomerate away from the guide.

### Claim 8 (depends on 6)

The method for manufacturing semiconductor devices according to claim 6, wherein
the step of subjecting the mixture to the heat treatment is a step of subjecting the mixture to a heat treatment at a higher temperature than a melting point of the polymers.