# US 10,483,185 B2 · Semiconductor device and method for manufacturing same

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 10,483,185 B2
- Document ID: US10483185B2
- Status: Granted
- Kind: B2
- Application number: 16/043,423
- Filed: 2018-07-24
- Published: 2019-02-14
- Granted: 2019-11-19
- Earliest claimed: 2017-08-10
- Assignees: Fujitsu Limited
- Applicants: Fujitsu Limited
- Inventors: Yuichi Minoura; Naoya Okamoto; Toshihiro Ohki
- Web page: https://patentgrep.com/patent/US10483185B2

## CPC

- H10W 40/254: {Diamond}
- H10D 30/475: {having wider bandgap layer formed on top of lower bandgap active layer, e.g. undoped barrier HEMTs such as i-AlGaN/GaN HEMTs}
- H10D 62/40: Crystalline structures
- H10D 62/8325: {Silicon carbide}
- H10D 62/8503: {Nitride Group III-V materials, e.g. AlN or GaN}
- H10P 52/00: Grinding, lapping or polishing of wafers, substrates or parts of devices
- H10W 72/30: Die-attach connectors
- H10W 99/00: Subject matter not provided for in other groups of this subclass
- H10W 72/07331: {Connecting techniques}
- H10W 72/07341: {Controlling the bonding environment, e.g. atmosphere composition or temperature}
- H10W 72/352: {comprising metals or metalloids, e.g. solders}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

A semiconductor device includes a semiconductor chip including a substrate and an element region on the substrate, a heat transfer body made of diamond, and a metal layer between the semiconductor chip and the heat transfer body, wherein the substrate includes an amorphous region on a back surface thereof, the amorphous region and the metal layer are bonded to each other, and the metal layer and the heat transfer body are bonded to each other.

## Claims

### Claim 1

A semiconductor device comprising:
a semiconductor chip including a substrate and an element region on the substrate;
a heat transfer body made of diamond; and
a metal layer between the semiconductor chip and the heat transfer body;
wherein the substrate includes an amorphous region on a back surface thereof,
the amorphous region and the metal layer are bonded to each other,
the metal layer and the heat transfer body are bonded to each other,
the substrate is a SiC substrate,
the amorphous region is an amorphous SiC region, and
an interface between the amorphous SiC region and the metal layer includes more C atoms than Si atoms.

### Claim 2 (depends on 1)

The semiconductor device according to claim 1, wherein the element region includes a high-electron-mobility transistor.

### Claim 3 (depends on 1)

The semiconductor device according to claim 1, wherein the amorphous SiC region includes Ar, Xe, He, Ne, or Kr.

### Claim 4 (depends on 1)

The semiconductor device according to claim 1, wherein the metal layer has a thickness greater than or equal to 1 nm.

### Claim 5 (depends on 1)

The semiconductor device according to claim 1, wherein the metal layer includes Ti or Ta.

### Claim 6 (depends on 1)

The semiconductor device according to claim 1, wherein the SiC substrate includes a crystalline region between the amorphous SiC region and the element region.

### Claim 7

A method for manufacturing a semiconductor device, the method comprising:
polishing a back surface of a substrate of a semiconductor chip, the semiconductor chip including the substrate and an element region on the substrate;
polishing a front surface of a heat transfer body made of diamond;
forming a metal layer on the front surface of the heat transfer body;
applying a noble gas to the back surface of the substrate and a front surface of the metal layer in a chamber where a vacuum is created, such that an amorphous region is formed on the substrate and also a back surface of the amorphous region and the front surface of the metal layer are activated; and
causing the activated back surface of the amorphous region and the activated front surface of the metal layer to adhere to each other in the chamber, such that the semiconductor chip and the heat transfer body are bonded to each other,
wherein the substrate is a SiC substrate,
the amorphous region is an amorphous SiC region, and
an interface between the amorphous SiC region and the metal layer includes more C atoms than Si atoms.

### Claim 8 (depends on 7)

The method for manufacturing a semiconductor device according to claim 7, wherein
surface roughness Ra of the back surface of the SiC substrate after polishing is less than or equal to 1 nm, and
surface roughness Ra of the front surface of the heat transfer body after polishing is less than or equal to 1 nm.

### Claim 9 (depends on 7)

The method for manufacturing a semiconductor device according to claim 7, wherein the element region includes a high-electron-mobility transistor.

### Claim 10 (depends on 7)

The method for manufacturing a semiconductor device according to claim 7, wherein the noble gas includes Ar, Xe, He, Ne, or Kr.

### Claim 11 (depends on 7)

The method for manufacturing a semiconductor device according to claim 7, wherein the thickness of the metal layer after the noble gas is applied is greater than or equal to 1 nm.

### Claim 12 (depends on 7)

The method for manufacturing a semiconductor device according to claim 7, wherein the metal layer includes Ti or Ta.

### Claim 13 (depends on 7)

The method for manufacturing a semiconductor device according to claim 7, wherein, after the noble gas is applied, the SiC substrate includes a crystalline region between the amorphous SiC region and the element region.