# US 10,483,156 B2 · Non-embedded silicon bridge chip for multi-chip module > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,483,156 B2 - Document ID: US10483156B2 - Status: Granted - Kind: B2 - Application number: 15/825,263 - Filed: 2017-11-29 - Published: 2019-05-30 - Granted: 2019-11-19 - Earliest claimed: 2017-11-29 - Assignees: International Business Machines Corporation - Applicants: International Business Machines Corporation - Inventors: Effendi Leobandung - Web page: https://patentgrep.com/patent/US10483156B2 ## CPC - H10W 20/01: {Manufacture or treatment} - H10D 84/01: Manufacture or treatment - H10W 70/20: Conductive package substrates serving as an interconnection, e.g. metal plates (leadframes H10W70/40) - H10W 70/611: {for connecting multiple chips together} - H10W 70/618: {the bridge chips being embedded in the package substrates, interposers or redistribution layers} - H10W 70/68: Shapes or dispositions thereof - H10W 72/00: Interconnections or connectors in packages - H10W 72/019: {of bond pads} - H10W 72/30: Die-attach connectors - H10W 90/00: Package configurations - H10W 90/401: {characterised by multiple insulating or insulated package substrates, interposers or RDLs} - H10W 70/63: Vias, e.g. via plugs - H10W 70/682: {comprising holes having chips therein} - H10W 72/072: {of bump connectors} - H10W 72/07207: {Temporary substrates, e.g. removable substrates} - H10W 72/07236: {Soldering or alloying} - H10W 72/073: {of die-attach connectors} - H10W 72/07307: {the auxiliary member being a temporary substrate, e.g. a removable substrate} - H10W 72/07337: {using a polymer adhesive, e.g. an adhesive based on silicone or epoxy} - H10W 72/227: {Multiple bumps having different sizes} - H10W 72/252: {comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu} - H10W 72/354: {comprising polymers} - H10W 72/877: {Bump connectors and die-attach connectors} - H10W 76/17: characterised by their materials - H10W 90/701: {characterised by the relative positions of pads or connectors relative to package parts} - H10W 90/722: {between stacked chips} - H10W 90/724: {between a chip and a stacked insulating package substrate, interposer or RDL} - H10W 90/734: {between a chip and a stacked insulating package substrate, interposer or RDL} - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES ## Abstract A method includes electrically joining two or more semiconductor chips to a silicon bridge chip, and electrically joining the two or more semiconductor chips to a substrate structure, the silicon bridge chip extends into a recess in the substrate structure such that a top surface of the silicon bridge chip is substantially flush with a top surface of the substrate structure. ## Claims ### Claim 1 A method comprising: providing a silicon bridge chip, the silicon bridge chip comprising a free-floating device; providing two or more semiconductor chips; electrically joining the two or more semiconductor chips to the silicon bridge chip; providing a substrate structure comprising a plurality of metal interconnect structures and a plurality of metal layers disposed on an interlevel dielectric; forming a recess within the substrate structure, the recess is located in a region of the substrate structure away from the plurality of metal interconnect structures and the plurality of metal layers; aligning the silicon bridge chip with the recess; and in response to electrically joining the two or more semiconductor chips to the silicon bridge chip and aligning the silicon bridge chip with the recess, electrically joining the silicon bridge chip and the two or more semiconductor chips to the substrate structure, wherein the silicon bridge chip extends into the recess in the substrate structure such that a top surface of the silicon bridge chip is substantially flush with a top surface of the substrate structure. ### Claim 2 (depends on 1) The method of claim 1, further comprising: attaching a lid to the top surface of the substrate structure and a bottom surface of the two or more semiconductor chips; and forming a plurality of solder bumps on a bottom surface of the substrate structure. ### Claim 3 (depends on 1) The method of claim 1, further comprising: placing an adhesive material between a bottom surface of the silicon bridge chip and a surface of the substrate structure located at a bottom portion of the recess, wherein the adhesive material physically joins the silicon bridge chip to the substrate structure. ### Claim 4 (depends on 1) The method of claim 1, wherein the recess in the substrate structure extends through an entire thickness of the substrate structure. ### Claim 5 (depends on 4) The method of claim 4, further comprising: forming a plug in direct contact with a bottom surface of the silicon bridge chip such that the plug substantially fills a portion of the recess located below the silicon bridge chip, the plug mechanically holds the silicon bridge chip, wherein a bottom surface of the plug is substantially flush with a bottom surface of the substrate structure. ### Claim 6 (depends on 4) The method of claim 4, further comprising: electrically joining the two or more semiconductor chips to the substrate structure such that the recess is directly below a portion of the two or more semiconductor chips; electrically joining the silicon bridge chip to the two or more semiconductor chips such that the top surface of the silicon bridge chip is substantially flush with the top surface of the substrate structure; and forming a plug in direct contact with a bottom surface of the silicon bridge chip such that the plug substantially fills a portion of the recess below the silicon bridge chip, the plug mechanically holds the silicon bridge chip, wherein a bottom surface of the plug is substantially flush with a bottom surface of the substrate structure. ### Claim 7 (depends on 1) The method of claim 1, wherein each of the two or more semiconductor chips comprises a silicon substrate, and the substrate structure comprises a laminated substrate, a ceramic substrate, or a printed circuit board. ### Claim 8 (depends on 1) The method of claim 1, wherein forming the recess within the substrate structure further comprises: selecting a location of the recess based on a desired location of the silicon bridge chip within the substrate structure; and selecting a shape and a size of the recess based on a shape and a size of the silicon bridge chip. ### Claim 9 (depends on 1) The method of claim 1, wherein the region of the substrate structure comprises a center of the substrate structure, an edge of the substrate structure, or a corner of the substrate structure. ### Claim 10 A method comprising: providing two or more semiconductor chips, wherein a first plurality of solder bumps is located on an inner top surface of the two or more semiconductor chips and a second plurality of solder bumps is located on an outer top surface of the two or more semiconductor chips; providing a silicon bridge chip, the silicon bridge chip comprising a free-floating device; providing a substrate structure comprising a plurality of metal interconnect structures and a plurality of metal layers disposed on an interlevel dielectric; forming a recess within the substrate structure, the recess is located in a region of the substrate structure away from the plurality of metal interconnect structures and the plurality of metal layers; electrically joining the two or more semiconductor chips, using the first plurality of solder bumps, to the silicon bridge chip; aligning the silicon bridge chip with the recess; in response to electrically joining the two or more semiconductor chips to the silicon bridge chip and aligning the silicon bridge chip with the recess, electrically joining the silicon bridge chip and the two or more semiconductor chips, using the second plurality of solder bumps, to the substrate structure, wherein the silicon bridge chip extends into the recess in the substrate structure such that a top surface of the silicon bridge chip is substantially flush with a top surface of the substrate structure; attaching a lid to the top surface of the substrate structure and a bottom surface of the two or more semiconductor chips; and forming a third plurality of solder bumps on a bottom surface of the substrate structure. ### Claim 11 (depends on 10) The method of claim 10, further comprising: placing an adhesive material between a bottom surface of the silicon bridge chip and a surface of the substrate structure located at a bottom of the recess, wherein the adhesive material physically joins the silicon bridge chip to the substrate structure. ### Claim 12 (depends on 10) The method of claim 10, wherein the recess in the substrate structure extends through an entire thickness of the substrate structure. ### Claim 13 (depends on 12) The method of claim 12, further comprising: forming a plug in direct contact with a bottom surface of the silicon bridge chip such that the plug substantially fills a portion of the recess located below the silicon bridge chip, the plug mechanically holds the silicon bridge chip, wherein a bottom surface of the plug is substantially flush with a bottom surface of the substrate structure. ### Claim 14 (depends on 12) The method of claim 12, further comprising: electrically joining the two or more semiconductor chips, using the second plurality of solder bumps, to the substrate structure such that the recess is directly below a portion of the two or more semiconductor chips and the first plurality of solder bumps are exposed; electrically joining the silicon bridge chip, using the first plurality of solder bumps, to the two or more semiconductor chips such that a top surface of the silicon bridge chip is substantially flush with a top surface of the substrate structure; and forming a plug in direct contact with a bottom surface of the silicon bridge chip such that the plug substantially fills a portion of the recess located below the silicon bridge chip, the plug mechanically holds the silicon bridge chip, wherein a bottom surface of the plug is substantially flush with a bottom surface of the substrate structure. ### Claim 15 (depends on 10) The method of claim 10, wherein solder bumps in the second plurality of solder bumps are larger than solder bumps in the first plurality of solder bumps. ### Claim 16 (depends on 10) The method of claim 10, wherein each of the two or more semiconductor chips comprises a silicon substrate, and the substrate structure comprises a laminated substrate, a ceramic substrate, or a printed circuit board. ### Claim 17 (depends on 10) The method of claim 10, wherein forming the recess within the substrate structure further comprises: selecting a location of the recess based on a desired location of the silicon bridge chip within the substrate structure; and selecting a shape and a size of the recess based on a shape and a size of the silicon bridge chip. ### Claim 18 (depends on 10) The method of claim 10, wherein the region of the substrate structure comprises a center of the substrate structure, an edge of the substrate structure, or a corner of the substrate structure.