# US 10,483,149 B2 · Wafer processing method for dividing a wafer, including a shield tunnel forming step > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,483,149 B2 - Document ID: US10483149B2 - Status: Granted - Kind: B2 - Application number: 16/059,238 - Filed: 2018-08-09 - Published: 2019-02-21 - Granted: 2019-11-19 - Earliest claimed: 2017-08-17 - Assignees: Disco Corporation - Applicants: Disco Corporation - Inventors: Hiroshi Morikazu - Web page: https://patentgrep.com/patent/US10483149B2 ## CPC - H10P 72/7402: {Wafer tapes, e.g. grinding or dicing support tapes} - B23K 26/362: Laser etching - B23K 26/53: for modifying or reforming the material inside the workpiece, e.g. for producing break initiation cracks - B23K 26/55: for creating voids inside the workpiece, e.g. for forming flow passages or flow patterns - H10D 84/01: Manufacture or treatment - H10P 34/42: with electromagnetic radiation, e.g. laser annealing (laser cutting H10P54/20) - H10P 50/242: {of Group IV materials} - H10P 54/00: Cutting or separating of wafers, substrates or parts of devices - H10P 72/0428: {Apparatus for mechanical treatment or grinding or cutting} - H10P 72/7416: {used during dicing or grinding} - H10P 72/7422: {used to protect an active side of a device or wafer} - H10P 72/744: {Details of chemical or physical process used for separating the auxiliary support from a device or a wafer} - H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10 - B23K: SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES ## Abstract A wafer processing method includes: a protective member placing step of placing a protective member on the face side of a wafer; a shield tunnel forming step of applying a laser beam, which has a wavelength that is transmittable through single-crystal silicon, to areas of the wafer that correspond to projected dicing lines from a reverse side of the wafer, thereby successively forming a plurality of shield tunnels in the wafer, each including a fine pore extending from the reverse side to the face side of the wafer and an amorphous region surrounding the fine pore; and a dividing step of dividing the wafer into individual device chips by etching the shield tunnels according to plasma etching. The pulsed laser beam used in the shield tunnel forming step has a wavelength of 1950 nm or higher. ## Claims ### Claim 1 A wafer processing method for dividing a wafer including a single-crystal silicon substrate having on a face side thereof a plurality of devices disposed in respective areas demarcated by a plurality of intersecting projected dicing lines, into individual device chips, the method comprising: a protective member placing step of placing a protective member on the face side of the wafer; a shield tunnel forming step of, after performing the protective member placing step, applying a laser beam, which has a wavelength that is transmittable through single-crystal silicon, to areas of the wafer that correspond to the projected dicing lines from a reverse side of the wafer, thereby successively forming a plurality of shield tunnels in the wafer, each including a fine pore extending from the reverse side to the face side of the wafer and an amorphous region surrounding the fine pore; and a dividing step of, after performing the shield tunnel forming step, dividing the wafer into individual device chips by etching the shield tunnels according to plasma etching, wherein the pulsed laser beam used in the shield tunnel forming step has a wavelength of 1950 nm or higher. ### Claim 2 (depends on 1) The wafer processing method according to claim 1, wherein, in the shield tunnel forming step, the pulsed laser beam is focused by a condensing lens having a numerical aperture set such that a value calculated by dividing the numerical aperture of the condensing lens by the refractive index of single-crystal silicon is in a range of 0.05 to 0.2. ### Claim 3 A wafer processing method for dividing a wafer including a single-crystal silicon substrate having on a face side thereof a plurality of devices disposed in respective areas demarcated by a plurality of intersecting projected dicing lines, into individual device chips, wherein the single-crystal silicon substrate includes a metal film of a test element group deposited on the projected dicing lines, the method comprising: a protective member placing step of placing a protective member on the face side of the wafer; a shield tunnel forming step of, after performing the protective member placing step, applying a laser beam, which has a wavelength that is transmittable through single-crystal silicon, to areas of the wafer that correspond to the projected dicing lines from a reverse side of the wafer, thereby successively forming a plurality of shield tunnels in the wafer, each including a fine pore extending from the reverse side to the face side of the wafer and an amorphous region surrounding the fine pore; a dividing step of, after performing the shield tunnel forming step, dividing the wafer into individual device chips by etching the shield tunnels according to plasma etching; and an external force applying step of using a tape expanding device to apply an external force to the wafer to sever the metal film along perforations formed therein during the shield tunnel forming step, wherein the pulsed laser beam used in the shield tunnel forming step has a wavelength of 1950 nm or higher. ### Claim 4 (depends on 3) The wafer processing method according to claim 3, wherein, in the shield forming step, the pulsed laser beam is focused by a condensing lens having a numerical aperture set such that a value calculated by dividing the numerical aperture of the condensing lens by the refractive index of single-crystal silicon is in a range of 0.05 to 0.2. ### Claim 5 A wafer processing method for dividing a wafer including a single-crystal silicon substrate having on a face side thereof a plurality of devices disposed in respective areas demarcated by a plurality of intersecting projected dicing lines, into individual device chips, wherein the single-crystal silicon substrate includes a low-k film deposited on the projected dicing lines, the method comprising: a protective member placing step of placing a protective member on the face side of the wafer; a shield tunnel forming step of, after performing the protective member placing step, applying a laser beam, which has a wavelength that is transmittable through single-crystal silicon, to areas of the wafer that correspond to the projected dicing lines from a reverse side of the wafer, thereby successively forming a plurality of shield tunnels in the wafer, each including a fine pore extending from the reverse side to the face side of the wafer and an amorphous region surrounding the fine pore; a dividing step of, after performing the shield tunnel forming step, dividing the wafer into individual device chips by etching the shield tunnels according to plasma etching; and an external force applying step of using a tape expanding device to apply an external force to the wafer to sever the low-k film along perforations formed therein during the shield tunnel forming step, wherein the pulsed laser beam used in the shield tunnel forming step has a wavelength of 1950 nm or higher. ### Claim 6 (depends on 5) The wafer processing method according to claim 5, wherein, in the shield forming step, the pulsed laser beam is focused by a condensing lens having a numerical aperture set such that a value calculated by dividing the numerical aperture of the condensing lens by the refractive index of single-crystal silicon is in a range of 0.05 to 0.2.