# US 10,483,129 B2 · Method for roughening the surface of a metal layer, thin film transistor, and method for fabricating the same

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 10,483,129 B2
- Document ID: US10483129B2
- Status: Granted
- Kind: B2
- Application number: 15/717,527
- Filed: 2017-09-27
- Published: 2018-08-09
- Granted: 2019-11-19
- Earliest claimed: 2017-02-09
- Assignees: Boe Technology Group Co., Ltd.
- Applicants: BOE Technology Group Co., Ltd.
- Inventors: Jing Feng; Seung Jin Choi; Fangzhen Zhang; Wusheng Li; Zhijun Lv; Ce Ning; Jiushi Wang
- Web page: https://patentgrep.com/patent/US10483129B2

## CPC

- H10P 95/00: Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
- G03F 7/0035: {Multiple processes, e.g. applying a further resist layer on an already in a previously step, processed pattern or textured surface}
- G03F 7/20: Exposure; Apparatus therefor (photographic printing apparatus for making copies G03B27/00)
- G03F 7/38: Treatment before imagewise removal, e.g. prebaking {(G03F7/265 takes precedence)}
- G03F 7/40: Treatment after imagewise removal, e.g. baking
- H10D 30/6713: {characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes}
- H10D 30/6755: {Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate}
- H10D 99/00: Subject matter not provided for in other groups of this subclass
- H10P 76/2041: {Photolithographic processes}
- H10D 86/0231: {using masks, e.g. half-tone masks}
- H10D 86/423: {comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO}
- H10D 86/60: wherein the TFTs are in active matrices
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- G03F: PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR; (phototypographic composing devices B41B; photosensitive materials or processes for photographic purposes G03C; electrophotography, sensitive layers or processes therefor G03G)
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

The disclosure discloses a method for roughening a surface of a metal layer, a thin film transistor, and a method for fabricating the same. The method for roughening the surface of a metal layer includes: forming a first photo-resist layer on the surface of the metal layer, and processing the first photo-resist layer at high temperature; and stripping the first photo-resist layer to roughen the surface of the metal layer.

## Claims

### Claim 1

A method for fabricating a thin film transistor, the method comprising:
forming an oxide semiconductor layer and a source-drain metal layer on an underlying substrate;
forming a first photo-resist layer on a surface of the source-drain metal layer, and processing the first photo-resist layer by pre-baking, exposing, developing, and post-baking the first photo-resist layer, wherein the post-baking is at a temperature ranging from 110° C. to 150° C.; and stripping the first photo-resist layer to roughen the surface of the source-drain metal layer; and
performing a patterning process on the roughened source-drain metal layer, and the oxide semiconductor layer to form patterns of source and drain electrodes, and a pattern of an active layer;
wherein performing the patterning process on the roughened source-drain metal layer, and the oxide semiconductor layer to form the patterns of the source and drain electrodes, and the pattern of the active layer comprises:
forming a second photo-resist layer on the roughened source-drain metal layer;
exposing and developing the second photo-resist layer to form an area where all the second photo-resist is reserved, an area where all the second photo-resist is removed, and an area where a part of the second photo-resist is reserved, wherein the area where a part of the second photo-resist is reserved corresponds to a channel area, and the area where all the second photo-resist is reserved corresponds to the patterns of the source and drain electrodes to be formed;
in the area where all the second photo-resist is removed, etching the roughened source-drain metal layer and the oxide semiconductor layer to form the pattern of the active layer;
ashing the second photo-resist layer to remove all of the second photo-resist layer located in the area where a part of the second photo-resist was reserved; and subsequently etching in the area where the part of the second photo-resist was reserved to remove the roughened source-drain metal layer to form the patterns of the source and drain electrodes;
wherein after etching the roughened source-drain metal layer and the oxide semiconductor layer to form the pattern of the active layer, the method further comprises:
over-etching the roughened source-drain metal layer and the oxide semiconductor layer for a period of time which is 5% to 20% of a length of time of etching the roughened source-drain metal layer and the oxide semiconductor layer.

### Claim 2 (depends on 1)

The method according to claim 1, wherein after exposing and developing the second photo-resist layer, and before etching the roughened source-drain metal layer and the oxide semiconductor layer to form the pattern of the active layer, the method further comprises:
post-baking the second photo-resist layer.

### Claim 3 (depends on 1)

The method according to claim 1, wherein after ashing the second photo-resist layer to remove all of the second photo-resist layer located in the area where the part of the second photo-resist was reserved, and before subsequently etching in the area where the part of the second photo-resist was reserved to remove the roughened source-drain metal layer, the method further comprises:
post-baking the second photo-resist layer.

### Claim 4 (depends on 1)

The method according to claim 1, wherein after etching in the area where the part of the second photo-resist was reserved to remove the roughened source-drain metal layer to form the patterns of the source and drain electrodes, the method further comprises: over etching in the area where the part of the second photo-resist was reserved for a period of time which is 0% to 20% of a length of time of etching in the area where the part of the second photo-resist was reserved to remove the roughened source-drain metal layer.

### Claim 5 (depends on 1)

A thin film transistor, comprising a thin film transistor fabricated using the method for fabricating a thin film transistor according to claim 1.

### Claim 6 (depends on 5)

An array substrate, comprising the thin film transistor according to claim 5.
