# US 10,483,112 B2 · Metal gate stack having TaAlCN layer

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- Number: US 10,483,112 B2
- Document ID: US10483112B2
- Status: Granted
- Kind: B2
- Application number: 16/042,527
- Filed: 2018-07-23
- Published: 2019-01-03
- Granted: 2019-11-19
- Earliest claimed: 2011-09-24
- Assignees: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicants: Taiwan Semiconductor Manufacturing Company, Ltd.
- Inventors: Shiu-Ko Jangjian; Ting-Chun Wang; Chi-Cherng Jeng; Chi-Wen Liu
- Web page: https://patentgrep.com/patent/US10483112B2

## CPC

- H10D 64/01318: {the conductor comprising a layer of alloy material, compound material or organic material contacting the insulator, e.g. TiN (comprising a layer of alloys of Si, Ge or C H10D64/01314)}
- H10D 30/797: {being in source or drain regions, e.g. SiGe source or drain}
- H10D 62/021: {Forming source or drain recesses by etching e.g. recessing by etching and then refilling}
- H10D 62/151: {of IGFETs (of IGFETs having LDD or DDD structure H10D30/601; of thin film transistors H10D30/6713)}
- H10D 62/822: comprising only Group IV materials heterojunctions, e.g. Si/Ge heterojunctions
- H10D 62/832: being Group IV materials comprising two or more elements, e.g. SiGe
- H10D 62/8325: {Silicon carbide}
- H10D 64/017: {using dummy gates in processes wherein at least parts of the final gates are self-aligned to the dummy gates, i.e. replacement gate processes}
- H10D 64/666: {the conductor further comprising additional layers}
- H10D 64/667: {the conductor comprising a layer of alloy material, compound material or organic material contacting the insulator, e.g. TiN workfunction layers (having lateral variation H10D64/671)}
- H10D 64/669: {the conductor further comprising additional layers of alloy material, compound material or organic material, e.g. TaN/TiAlN}
- H10D 84/014: {the gate conductors having different materials or different implants}
- H10D 84/038: {using silicon technology, e.g. SiGe}
- H10D 84/83: of only insulated-gate FETs [IGFET]
- H10P 14/69393: {the material containing tantalum, e.g. Ta2O5}
- H10D 64/685: {being perpendicular to the channel plane}
- H10D 64/691: {comprising metallic compounds, e.g. metal oxides or metal silicates (insulators comprising nitrogen H10D64/693)}
- H10D 64/693: {the insulator comprising nitrogen, e.g. nitrides, oxynitrides or nitrogen-doped materials}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

Gate stacks for improving integrated circuit device performance and methods for fabricating such gate stacks are disclosed herein. An exemplary method includes forming a gate stack over a substrate and at least partially removing the gate stack, thereby forming an opening. A multi-function layer is deposited in the opening and a work function layer is deposited over the multi-function layer. The multi-function layer includes nitrogen and one of titanium or tantalum. The work function layer includes nitrogen and one of titanium or tantalum. A concentration of the nitrogen of the work function layer is different than a concentration of the nitrogen of the multi-function layer. In some implementations, the concentration of the nitrogen of the work function layer from about 2% to about 5% and the concentration of the nitrogen of the multi-function layer from about 5% to about 15%.

## Claims

### Claim 1

A method comprising:
forming a gate stack over a substrate by:
depositing a gate dielectric layer over the substrate;
depositing a multi-function layer over the gate dielectric layer, wherein the depositing the multi-function layer includes depositing a first metal nitride material with a first nitrogen (N) concentration to form a first sub-layer of the multi-function layer over the gate dielectric layer and depositing a second metal nitride material with a second N concentration to form a second sub-layer of the multi-function layer over the first sub-layer, wherein the first N concentration is greater than the second N concentration; and
depositing a work function layer over the multi-function layer.

### Claim 2 (depends on 1)

The method of claim 1, wherein the depositing the multi-function layer over the gate dielectric layer includes performing a physical vapor deposition process.

### Claim 3 (depends on 2)

The method of claim 2, wherein the performing the physical vapor deposition process includes tuning process parameters to set the first N concentration from about 5% to about 15% and the second N concentration from about 2% to about 5%.

### Claim 4 (depends on 3)

The method of claim 3, further comprising depositing the first metal nitride material directly on the gate dielectric layer, wherein the second metal nitride material is deposited over the first metal nitride material.

### Claim 5 (depends on 2)

The method of claim 2, wherein the performing the physical vapor deposition process includes using a precursor that includes tantalum, aluminum, carbon, and nitrogen.

### Claim 6 (depends on 2)

The method of claim 2, wherein the performing the physical vapor deposition process includes using a precursor that includes titanium, aluminum, carbon, and nitrogen.

### Claim 7 (depends on 1)

The method of claim 1, wherein the depositing the gate dielectric layer includes depositing a high-k dielectric layer.

### Claim 8 (depends on 1)

The method of claim 1, wherein the depositing the multi-function layer and the depositing the work function layer is performed after removing a polysilicon gate layer.

### Claim 9

A method comprising:
forming a gate stack over a substrate;
at least partially removing the gate stack, thereby forming an opening;
depositing a multi-function layer in the opening, wherein the multi-function layer includes nitrogen and one of titanium or tantalum; and
depositing a work function layer over the multi-function layer, wherein the work function layer includes nitrogen and one of titanium or tantalum, and further wherein a concentration of the nitrogen of the work function layer is less than a concentration of the nitrogen of the multi-function layer.

### Claim 10 (depends on 9)

The method of claim 9, wherein the depositing the multi-function layer and the depositing the work function layer includes performing a physical vapor deposition process that implements a precursor that includes nitrogen and one of titanium or tantalum, wherein the physical vapor deposition process is tuned to set the concentration of the nitrogen of the work function layer from about 2% to about 5% and the concentration of the nitrogen of the multi-function layer from about 5% to about 15%.

### Claim 11 (depends on 10)

The method of claim 10, wherein the precursor further includes carbon when depositing the multi-function layer, the method further comprising tuning the physical vapor deposition process to set a concentration of carbon from about 5% to about 20%.

### Claim 12 (depends on 10)

The method of claim 10, wherein the precursor further includes aluminum when depositing the multi-function layer and depositing the work function layer.

### Claim 13 (depends on 9)

The method of claim 9, further comprising depositing a high-k dielectric layer in the opening before depositing the multi-function layer.

### Claim 14 (depends on 13)

The method of claim 13, further comprising depositing a capping layer over the high-k dielectric layer, wherein the capping layer includes nitrogen and one of titanium or tantalum.

### Claim 15 (depends on 9)

The method of claim 9, wherein:
the forming the gate stack over the substrate includes forming a high-k dielectric layer over the substrate, forming a capping layer over the high-k dielectric layer, and forming a polysilicon layer over the capping layer, wherein the capping layer includes nitrogen and one of titanium or tantalum; and
the at least partially removing the gate stack includes removing the polysilicon layer, wherein the opening exposes the capping layer.

### Claim 16

A method comprising:
forming a dummy gate stack over a substrate; and
replacing at least a portion of the dummy gate stack with a metal gate stack, wherein the replacing includes:
depositing a multi-function layer that includes nitrogen and one of titanium or tantalum,
depositing a work function layer over the multi-function layer, wherein the work function layer includes nitrogen and one of titanium or tantalum, and further wherein a concentration of the nitrogen of the work function layer is less than a concentration of the nitrogen of the multi-function layer,
depositing a conductive layer over the work function layer, and
performing a planarization process to remove any excess multi-function layer, work function layer, and conductive layer.

### Claim 17 (depends on 16)

The method of claim 16, further comprising tuning process parameters of the depositing of the multi-function layer and the depositing of the work function layer, such that the concentration of the nitrogen of the work function layer is lower than the concentration of the nitrogen of the multi-function layer.

### Claim 18 (depends on 17)

The method of claim 17, wherein the concentration of the nitrogen of the work function layer is about 2% to about 5% and the concentration of the nitrogen of the multi-function layer is about 5% to about 15%.

### Claim 19 (depends on 16)

The method of claim 16, wherein the depositing the conductive layer includes depositing a conductive material that includes aluminum.

### Claim 20 (depends on 16)

The method of claim 16, wherein the multi-function layer and the work function layer further include aluminum.