# US 10,483,108 B2 · Semiconductor device and method of manufacture > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,483,108 B2 - Document ID: US10483108B2 - Status: Granted - Kind: B2 - Application number: 15/724,031 - Filed: 2017-10-03 - Published: 2018-11-01 - Granted: 2019-11-19 - Earliest claimed: 2017-04-28 - Assignees: Taiwan Semiconductor Manufacturing Company, Ltd. - Applicants: Taiwan Semiconductor Manufacturing Company, Ltd. - Inventors: Jian-Jou Lian; Yao-Wen Hsu; Neng-Jye Yang; Li-Min Chen; Chia-Wei Wu; Kuan-Lin Chen; Kuo Bin Huang - Web page: https://patentgrep.com/patent/US10483108B2 ## CPC - H10P 76/204: {of organic photoresist masks} - G03F 7/094: {Multilayer resist systems, e.g. planarising layers} - G03F 7/20: Exposure; Apparatus therefor (photographic printing apparatus for making copies G03B27/00) - G03F 7/32: Liquid compositions therefor, e.g. developers - H10P 14/6339: {deposition by cyclic CVD, e.g. ALD, ALE or pulsed CVD} - H10P 50/283: {by chemical means} - H10P 76/405: {characterised by their composition, e.g. multilayer masks} - H10P 76/4085: {characterised by the processes involved to create the masks} - G03F 7/095: having more than one photosensitive layer (G03F7/075 takes precedence) - H10P 50/644: {Anisotropic liquid etching (H10P50/61 takes precedence)} - H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10 - G03F: PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR; (phototypographic composing devices B41B; photosensitive materials or processes for photographic purposes G03C; electrophotography, sensitive layers or processes therefor G03G) ## Abstract A semiconductor device and method of manufacture are provided. After a patterning of a middle layer, the middle layer is removed. In order to reduce or prevent damage to other underlying layers exposed by the patterning of the middle layer and intervening layers, an inhibitor is included within an etching process in order to inhibit the amount of material removed from the underlying layers. ## Claims ### Claim 1 A method of manufacturing a semiconductor device, the method comprising: patterning a middle layer and a bottom layer to expose a spacer material located over a hard mask, wherein prior to the patterning the middle layer and the bottom layer are located on a first side of the spacer layer and a semiconductor substrate is located on a second side of the spacer layer opposite the first side; and applying an etchant to be in physical contact with both the middle layer and the spacer material, wherein the etchant comprises an inhibitor which inhibits an etch rate of the spacer material. ### Claim 2 (depends on 1) The method of claim 1, wherein the inhibitor is N-hydroxyethylphthalimide. ### Claim 3 (depends on 1) The method of claim 1, further comprising depositing a dielectric material over the spacer material. ### Claim 4 (depends on 3) The method of claim 3, wherein the depositing the dielectric material is performed at least in part using an atomic layer deposition process. ### Claim 5 (depends on 1) The method of claim 1, wherein the etchant comprises dilute hydrofluoric acid. ### Claim 6 (depends on 5) The method of claim 5, wherein the spacer material is titanium oxide. ### Claim 7 (depends on 6) The method of claim 6, wherein the inhibitor comprises an N-ethanolamide derivative ligand. ### Claim 8 (depends on 6) The method of claim 6, wherein the inhibitor is a chelator. ### Claim 9 A method of manufacturing a semiconductor device, the method comprising: depositing a spacer material over and along sidewalls of a mandrel; placing a tri-layer photoresist over the spacer material, the tri-layer photoresist comprising: a bottom layer; a middle layer; and a photoresist; patterning the middle layer and the bottom layer to form a first opening and expose the spacer material; removing the middle layer with an etching solution, the etching solution comprising an inhibitor to lower an etch rate of the spacer material during the removing the middle layer; and filling the first opening with a masking material, wherein the filling the first opening comprises filling the first opening with a dielectric material. ### Claim 10 (depends on 9) The method of claim 9, further comprising filling the first opening using at least in part an atomic layer deposition process. ### Claim 11 (depends on 9) The method of claim 9, wherein the dielectric material is free from voids. ### Claim 12 (depends on 9) The method of claim 9, wherein the inhibitor has a concentration of between about 10%-wt and about 40%-wt. ### Claim 13 (depends on 9) The method of claim 9, wherein the dielectric material is an oxide. ### Claim 14 (depends on 13) The method of claim 13, wherein the dielectric material is a low temperature oxide. ### Claim 15 A method of manufacturing a semiconductor device, the method comprising: patterning a middle layer and a bottom layer to expose a layer of titanium oxide, wherein prior to the patterning the middle layer and the bottom layer are located on an opposite side of the layer of titanium oxide from a semiconductor substrate; applying an etchant to remove the middle layer; and lowering an etching rate of the layer of titanium oxide by simultaneously applying an inhibitor to the layer of titanium oxide, wherein the inhibitor comprises an N-ethanolamide derivative ligand. ### Claim 16 (depends on 15) The method of claim 15, wherein the inhibitor is 1-(2-hydroxyethyl)-2-pyrrolidinone. ### Claim 17 (depends on 15) The method of claim 15, wherein the inhibitor is N,N-diethanolamide. ### Claim 18 (depends on 15) The method of claim 15, wherein the inhibitor is N-hydroxyethylphthalimide. ### Claim 19 (depends on 15) The method of claim 15, wherein the inhibitor is 1-(2-hydroxyethyl)pyrrolidine-2,5-dione. ### Claim 20 (depends on 15) The method of claim 15, wherein the inhibitor is N-(2-hydroxyethyl)-1,2,3,6-tetrahydrophthalimide.