# US 10,483,023 B1 · Resistor calibration > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,483,023 B1 - Document ID: US10483023B1 - Status: Granted - Kind: B1 - Application number: 16/016,117 - Filed: 2018-06-22 - Granted: 2019-11-19 - Earliest claimed: 2018-06-22 - Assignees: Futurewei Technologies, Inc. - Applicants: Futurewei Technologies, Inc. - Inventors: Nadi Itani - Web page: https://patentgrep.com/patent/US10483023B1 ## CPC - H01C 10/16: including plural resistive elements - H04B 1/0028: {wherein the AD/DA conversion occurs at baseband stage} - G05F 1/46: wherein the variable actually regulated by the final control device is DC (G05F1/625 takes precedence) - H01C 1/16: Resistor networks not otherwise provided for - H04B 1/3827: Portable transceivers - H01C: RESISTORS - H04B: TRANSMISSION - G05F: SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES ## Abstract An electrical circuit includes a configurable resistor and a reference resistor with a current source circuit coupled to provide a current to the configurable resistor and the reference resistor. An Analog-to-Digital Converter (ADC) is configured to convert voltages from the configurable resistor and the reference resistor to digital values. A calculation circuit is configured to calculate an adjustment for the configurable resistor from a digital reference value obtained from a reference resistor voltage and two or more digital values obtained from two or more voltages corresponding to two or more configurations of the configurable resistor. A sequencer adjusts the configurable resistor based on the adjustment calculated by the calculation circuit. ## Claims ### Claim 1 An electrical circuit, comprising: a configurable resistor; a reference resistor; a current source circuit coupled to provide a current to the configurable resistor and the reference resistor; an Analog-to-Digital Converter (ADC) coupled to the configurable resistor and the reference resistor, the ADC configured to convert voltages from the configurable resistor and the reference resistor to digital values; a calculation circuit coupled to receive digital values from the ADC, the calculation circuit configured to calculate an adjustment for the configurable resistor from a digital reference value obtained from a reference resistor voltage and two or more digital values obtained from two or more voltages corresponding to two or more configurations of the configurable resistor; and a sequencer configured to adjust the configurable resistor based on the adjustment calculated by the calculation circuit. ### Claim 2 (depends on 1) The electrical circuit of claim 1 wherein the two or more digital values include a first digital value obtained from conversion of a first voltage from the configurable resistor in a first configuration, a second digital value obtained from conversion of a second voltage from the configurable resistor in a second configuration. ### Claim 3 (depends on 2) The electrical circuit of claim 2 wherein the configurable resistor is configurable to have a set of discrete resistance values configurable by a set of configuration codes, each discrete resistance value based on a corresponding configuration code, the first configuration corresponding to a first configuration code, the second configuration corresponding to a second configuration code, and a target configuration corresponding to a target configuration code, the calculation circuit configured to calculate the target configuration code for the configurable resistor and the sequencer configured to adjust the configurable resistor by sending the target configuration to the configurable resistor. ### Claim 4 (depends on 3) The electrical circuit of claim 3 wherein the set of discrete resistance values are stepped values with each discrete resistance value differing from adjacent discrete resistance values by a step and wherein the calculation circuit is configured to calculate a step voltage from a difference between the first digital value and the second digital value divided by a number of configurations between the first configuration and the second configuration. ### Claim 5 (depends on 4) The electrical circuit of claim 4 wherein the calculation circuit is configured to calculate a first difference between the first digital value and the digital reference value divided by the step voltage. ### Claim 6 (depends on 5) The electrical circuit of claim 5 wherein the calculation circuit is configured to calculate a second difference between the second digital value and the digital reference value divided by the step voltage and to select a smaller one of the first or second differences to obtain the target configuration code. ### Claim 7 (depends on 1) The electrical circuit of claim 1 wherein the current source circuit includes a current mirror, a first leg of the current mirror coupled to the reference resistor and a second leg of the current mirror coupled to the configurable resistor. ### Claim 8 (depends on 7) The electrical circuit of claim 7 wherein the current mirror includes a third leg coupled to a current output. ### Claim 9 (depends on 8) The electrical circuit of claim 8 further comprising a first switch between the first leg of the current mirror and the reference resistor, a second switch between the third leg and the current output, and a third switch between the first leg and the current output, configurable to connect the current output to either the first leg or the third leg of the current mirror. ### Claim 10 (depends on 8) The electrical circuit of claim 8 wherein the current source circuit further includes an operational amplifier having an output controlling the first leg, second leg, and third leg of the current mirror, an input of the operational amplifier coupled to the first leg and the second leg of the current mirror. ### Claim 11 A method of calibrating a configurable resistor comprising: generating a reference voltage from an electrical current applied to a reference resistor having a target resistance; converting the reference voltage to a digital reference value; generating a first voltage from the electrical current applied to the configurable resistor while the configurable resistor is in a first configuration generated by a first configuration code; converting the first voltage to a first digital value; generating a second voltage from the electrical current applied to the configurable resistor while the configurable resistor is in a second configuration generated by a second configuration code to generate a second voltage; converting the second voltage to a second digital value; calculating from the digital reference value, the first digital value, and the second digital value, a target configuration code corresponding to the target resistance; and configuring the configurable resistor by providing the target configuration code to the configurable resistor. ### Claim 12 (depends on 11) The method of claim 11 wherein calculating the target configuration code includes calculating a step voltage, the step voltage calculated from a difference between the first digital value and the second digital value divided by a number of configurations from the first configuration to the second configuration. ### Claim 13 (depends on 12) The method of claim 12 wherein calculating the target configuration code includes calculating a difference between the first digital value and the digital reference value divided by the step voltage to obtain a first offset from the first configuration code. ### Claim 14 (depends on 13) The method of claim 13 wherein calculating the target configuration code further comprises calculating a difference between the second digital value and the digital reference value divided by the step voltage to obtain a second offset from the second configuration code, the target configuration code calculated from the smaller of the first offset from the first configuration code and the second offset from the second configuration code. ### Claim 15 (depends on 14) The method of claim 14 further comprising: providing the electrical current to the configurable resistor while the configurable resistor is in an additional one or more configurations generated by an additional one or more configuration codes to generate an additional one or more voltages; converting the additional one or more voltages to an additional one or more digital values; calculating differences between the additional one or more digital values and the digital reference value divided by the step voltage to obtain an additional one or more offsets from the additional one or more configuration codes; and calculating the target configuration code using the smaller of the first offset from the first configuration code, the second offset from the second configuration code, and the additional one or more offsets from the additional one or more configuration codes. ### Claim 16 (depends on 11) The method of claim 11 wherein providing the electrical current to the reference resistor and providing the electrical current to the configurable resistor includes configuring a current mirror to mirror the electrical current to the reference resistor and the configurable resistor, and further includes mirroring the electrical current to a current output. ### Claim 17 (depends on 11) The method of claim 11 wherein the digital reference value, the first digital value, and the second digital value are obtained in a predetermined sequence and calculating the target configuration code occurs after completion of the predetermined sequence. ### Claim 18 A resistance calibration circuit, comprising: a configurable resistor configurable by a digital configuration code to have a configuration from a set of configurations corresponding to a set of stepped resistance values; a reference resistor of a predetermined resistance; a current mirror coupled to provide a mirrored current to a first terminal of the configurable resistor and to a first terminal of the reference resistor, a second terminal of the configurable resistor and a second terminal of the reference resistor connected to ground; an Analog-to-Digital Converter (ADC) coupled to the configurable resistor and the reference resistor, the ADC configured to convert a first voltage from the first terminal of the configurable resistor in a first configuration to a first digital value, convert a second voltage from the first terminal of the configurable resistor in a second configuration to a second digital value, and convert a voltage at the first terminal of the reference resistor to a digital reference value; a calculation circuit configured to calculate a difference between the first digital value and the second digital value divided by a number of configurations from the first configuration to the second configuration to obtain a step voltage, divide the difference between at least one of the first or second digital values and the digital reference value by the step voltage to obtain an offset, and generate a target code by applying the offset to the first or second digital value; and a sequencer to configure the configurable resistor according to the target code to have a resistance corresponding to the predetermined resistance. ### Claim 19 (depends on 18) The resistance calibration circuit of claim 18 further comprising a plurality of switches and wherein the sequencer is further coupled to control the plurality of switches to configure the current mirror in a plurality of configurations including at least a calibration configuration and an operational configuration. ### Claim 20 (depends on 18) The resistance calibration circuit of claim 18 wherein the digital configuration code is an n digit code, the configurable resistor has a configuration range that includes 2n configurations, and the first configuration and second configuration are equally spaced from a mid-point of the configuration range at 2n/4 above and below the mid-point of the configuration range respectively.