# US 10,482,955 B2 · Storage array, and storage chip and method for storing logical relationship of objects

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- Number: US 10,482,955 B2
- Document ID: US10482955B2
- Status: Granted
- Kind: B2
- Application number: 15/739,883
- Filed: 2015-12-24
- Published: 2018-11-08
- Granted: 2019-11-19
- Earliest claimed: 2015-12-18
- Assignees: Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Scienc
- Applicants: Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences
- Inventors: Sannian Song; Xiaogang Chen; Zhitang Song; Tianqi Guo
- Web page: https://patentgrep.com/patent/US10482955B2

## CPC

- G11C 13/0026: {Bit-line or column circuits}
- G11C 7/1006: {Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor}
- G11C 11/54: using elements simulating biological cells, e.g. neuron
- G11C 13/0004: {comprising amorphous/crystalline phase transition cells}
- G11C 13/0023: {Address circuits or decoders}
- G11C 13/003: {Cell access}
- G11C 13/004: {Reading or sensing circuits or methods}
- G11C 13/0069: {Writing or programming circuits or methods}
- H10B 63/20: {comprising selection components having two electrodes, e.g. diodes}
- H10N 70/20: Multistable switching devices, e.g. memristors
- G11C 2213/72: Array wherein the access device being a diode
- G11C 2213/79: Array wherein the access device being a transistor
- H10N 70/231: {based on solid-state phase change, e.g. between amorphous and crystalline phases, Ovshinsky effect}
- H10N 70/826: {adapted for essentially vertical current flow, e.g. sandwich or pillar type devices}
- H10N 70/8828: {Tellurides, e.g. GeSbTe}
- G11C: STATIC STORES (semiconductor memory devices H10B)
- H10B: ELECTRONIC MEMORY DEVICES
- H10N: ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR

## Abstract

A storage array and a storage chip and method for storing a logic relationship between objects. The storage array comprises first leading-out wires and second leading-out wires, and a storage unit is connected between each first leading-out wire and each second leading-out wire having different serial numbers. A controllable switch is connected between each first leading-out wire and each second leading-out wire having a same serial number. The storage chip comprises an interface module. A control module is used for producing a control signal. A driving module is used for producing write current, erase current or read current. A first decoder and a second decoder are used for gating the first leading-out wires and the second leading-out wires. A storage array is used for storing a logic relationship value. The storage method comprises write and read operations.

## Claims

### Claim 1

A storage array, characterized in that the storage array at least comprises:
first leading-out wires and second leading-out wires which have the same quantity and are respectively located in a line direction and a column direction; the first leading-out wires and the second leading-out wires being respectively numbered; a storage unit being connected between each first leading-out wire and each second leading-out wire having different serial numbers; and a controllable switch being connected between each first leading-out wire and each second leading-out wire having a same serial number, wherein,
the storage unit comprises a variable-resistance two-terminal device and a gating diode which are connected in series, and the gating diode is forwardly conducted from the first leading-out wire to the second leading-out wire and is reversely cut off from the second leading-out wire to the first leading-out wire; and
the controllable switch is switched between a bidirectional cut-off state and a unidirectional conducted state from the second leading-out wire to the first leading-out wire.

### Claim 2 (depends on 1)

The storage array according to claim 1, characterized in that the variable-resistance two-terminal device is capable of changing between at least two resistance values under an effect of an electrical pulse signal.

### Claim 3 (depends on 1)

The storage array according to claim 1, characterized in that a resistance value of the variable-resistance two-terminal device is capable of changing between a maximum resistance value and a minimum resistance value under an effect of an electrical pulse signal according to different intensities and waveforms of electrical exciting signals, wherein the maximum resistance value is higher than the minimum resistance value by at least one magnitude.

### Claim 4 (depends on 1)

A storage chip for storing a logic relationship between objects, characterized in that the storage chip for storing the logic relationship between objects at least comprises:
an interface module, a control module, a driving module, a first decoder, a second decoder and the storage array according to claim 1; wherein:
the interface module is used for inputting and outputting data;
the control module is connected with the interface module, the driving module and the first decoder, and is used for acquiring an input instruction and producing a corresponding control signal;
the driving module is connected with the control module and the second decoder, and is used for producing write current, erase current or read current according to the control signal output by the control module;
the first decoder is connected with the control module and first leading-out wires of the storage array, and is used for gating the corresponding first leading-out wire under the control of the control module;
the second decoder is connected with the driving module and second leading-out wires of the storage array, and is used for gating the corresponding second leading-out wire under the control of the control module; and
the storage array is respectively connected with the control module, the first decoder and the second decoder, and is used for turning off all controllable switches under the control of the control module, and writing a logic relationship value into a storage unit between the gated first leading-out wire and the gated second leading-out wire; or turning on all controllable switches under the control of the control module, and reading a logic relationship value from a storage unit between the gated first leading-out wire and the gated second leading-out wire.

### Claim 5 (depends on 4)

The storage chip for storing the logic relationship between objects according to claim 4, characterized in that the gated first leading-out wire represents a first object as a condition; the gated second leading-out wire represents a second object as a result; the logic relationship value is a probability value that the second object is directly caused to be established when the first object is established, and the first leading-out wire and the second leading-out wire having a same serial number correspond to a same object.

### Claim 6 (depends on 1)

A storage method for storing a logic relationship between objects, characterized in that the storage method for storing the logic relationship between objects adopts the storage array according to claim 1, and at least comprises the following steps:
write operation:
inputting information which needs to be written, including a first object, a second object and a logic relationship value between the first object and the second object;
turning off all controllable switches in the storage array;
gating a first leading-out wire corresponding to the first object and gating a second leading-out wire corresponding to the second object; and
producing write current corresponding to the logic relationship value between the first object and the second object, and applying the write current to a storage unit between the gated first leading-out wire and the gated second leading-out wire; and
read operation:
inputting an object group having a relationship which needs to be read out, the object group comprising the first object and the second object;
turning on all controllable switches in the storage array;
gating the first leading-out wire corresponding to the first object and gating the second leading-out wire corresponding to the second object;
producing read voltage or current, applying the read voltage or current to the gated first leading-out wire and the gated second leading-out wire, and reading a resistance value between the gated first leading-out wire and the gated second leading-out wire; and
converting the read resistance value into a corresponding logic relationship value and then outputting the logic relationship value.

### Claim 7 (depends on 6)

The storage method for storing the logic relationship between objects according to claim 6, characterized in that the first object is a condition, the second object is a result and the logic relationship value is a probability value that the second object is directly caused to be established when the first object is established.

### Claim 8 (depends on 6)

The storage method for storing the logic relationship between objects according to claim 6, characterized in that, in the write operation, the written logic relationship value overwrites an original logic relationship value; or is superposed on the basis of an original logic relationship value to enhance a logic relationship between the first object and the second object.

### Claim 9 (depends on 6)

The storage method for storing the logic relationship between objects according to claim 6, characterized in that, in the read operation, if the first object and the second object have a direct relationship, and a resistance value corresponding to the logic relationship value between the first object and the second object is directly read out; if the first object and the second object have an indirect relationship through a third object, a sum of a resistance value corresponding to a logic relationship value between the first object and the third object and a resistance value corresponding to a logic relationship value between the third object and the second object is read out; and if the first object and the second object not only have a direct relationship but also have an indirect relationship through the third object, a resistance value obtained by connecting in series the resistance value corresponding to the logic relationship value between the first object and the third object with the resistance value corresponding to the logic relationship value between the third object and the second object and then connecting with the resistance value corresponding to the logic relationship value between the first object and the second object in parallel is read out.

### Claim 10 (depends on 6)

The storage method for storing the logic relationship between objects according to claim 6, characterized in that, in the write operation, a method for gating the second leading-out wire corresponding to the second object comprises: grounding the second leading-out wire corresponding to the second object, and suspending other second leading-out wires or applying a high level to other second leading-out wires to reversely cut off the gating diodes in unselected storage units.

### Claim 11 (depends on 6)

The storage method for storing the logic relationship between objects according to claim 6, characterized in that, in the read operation, a method for gating the second leading-out wire corresponding to the second object comprises: grounding the second leading-out wire corresponding to the second object and suspending other second leading-out wires.