1T1D DRAM cell and access method and associated device for DRAM

An access device applied to a Dynamic Random-Access Memory cell, a circuit of said memory cell comprises a data transmission node and a transmission control node, said data transmission node is applied for writing and reading data, said transmission control node is applied for controlling data input and output;

• wherein said access device comprises a trigger and a transistor, said trigger comprises a signal input connective point, said transistor comprises a data rewrite connective point and a control input connective point said signal input connective point connects or couples to said data rewrite connective point, said data transmission node connects or couples to said signal input connective point and said data rewrite connective point, said trigger outputs an inverted signal which inverts said signal input connective point and connects to said control input connective point;
• while the cell read operation, when said trigger detected that the variation of said data transmission node is over the trigger level then turns on said transistor, otherwise continue cuts off said transistor;
• and the rewrite operation of said memory cell is said transistor be turned on.