# US 10,482,941 B2 · Magnetic memory device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,482,941 B2 - Document ID: US10482941B2 - Status: Granted - Kind: B2 - Application number: 16/128,554 - Filed: 2018-09-12 - Published: 2019-09-19 - Granted: 2019-11-19 - Earliest claimed: 2018-03-14 - Assignees: Toshiba Memory Corporation - Applicants: Toshiba Memory Corporation - Inventors: Takuya Shimada; Yasuaki Ootera; Tsuyoshi Kondo; Nobuyuki Umetsu; Michael Arnaud Quinsat; Masaki Kado; Susumu Hashimoto; Shiho Nakamura; Hideaki Aochi; Tomoya Sanuki; Shinji Miyano; Yoshihiro Ueda; Yuichi Ito; Yasuhito Yoshimizu - Web page: https://patentgrep.com/patent/US10482941B2 ## CPC - G11C 11/1675: {Writing or programming circuits or methods} - G11C 11/161: {details concerning the memory cell structure, e.g. the layers of the ferromagnetic memory cell} - G11C 11/1659: {Cell access} - G11C 11/1673: {Reading or sensing circuits or methods} - G11C 19/0841: {using electric current} - H01F 10/3254: {the spacer being semiconducting or insulating, e.g. for spin tunnel junction [STJ]} - H10B 61/22: {of the field-effect transistor [FET] type} - H10N 50/80: Constructional details - G11C 11/02: using magnetic elements - G11C 11/16: using elements in which the storage effect is based on magnetic spin effect - H01F 10/329: {Spin-exchange coupled multilayers wherein the magnetisation of the free layer is switched by a spin-polarised current, e.g. spin torque effect} - G11C: STATIC STORES (semiconductor memory devices H10B) - H01F: MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES - H10B: ELECTRONIC MEMORY DEVICES - H10N: ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR ## Abstract According to one embodiment, a magnetic memory device includes a first memory portion, a first conductive portion, a first interconnection, and a controller. The first memory portion includes a first magnetic portion including a first portion and a second portion, a first magnetic layer, and a first nonmagnetic layer provided between the second portion and the first magnetic layer. The first conductive portion is electrically connected to the first portion. The first interconnection is electrically connected to the first magnetic layer. The controller is electrically connected to the first conductive portion and the first interconnection. The controller applies a first pulse having a first pulse height and a first pulse length between the first conductive portion and the first interconnection in a first write operation and applies a second pulse having a second pulse height and a second pulse length in a first shift operation. ## Claims ### Claim 1 A magnetic memory device, comprising: a first memory portion including a first magnetic portion including a first portion and a second portion, a first magnetic layer, and a first nonmagnetic layer provided between the second portion and the first magnetic layer; a first conductive portion electrically connected to the first portion; a first interconnection electrically connected to the first magnetic layer; and a controller electrically connected to the first conductive portion and the first interconnection, the controller being configured to apply a first pulse between the first conductive portion and the first interconnection in a first write operation, the first pulse having a first pulse height and a first pulse length, the controller being configured to apply a second pulse between the first conductive portion and the first interconnection in a first shift operation, the second pulse having a second pulse height and a second pulse length, an absolute value of the second pulse height being less than an absolute value of the first pulse height, the second pulse length being longer than the first pulse length. ### Claim 2 (depends on 1) The device according to claim 1, wherein the controller applies a third pulse between the first conductive portion and the first interconnection in a first read operation, the third pulse having a third pulse height and a third pulse length, and an absolute value of the third pulse height is less than the absolute value of the second pulse height. ### Claim 3 (depends on 2) The device according to claim 2, further comprising a first switch provided in a first current path between the first conductive portion and the first interconnection, the third pulse being supplied to the first memory portion via the first switch. ### Claim 4 (depends on 1) The device according to claim 1, further comprising a first switch provided in a first current path including the first conductive portion, the first memory portion, and the first interconnection, the first pulse and the second pulse being supplied to the first memory portion via the first switch. ### Claim 5 (depends on 4) The device according to claim 4, further comprising a second interconnection electrically connected to a first gate of the first switch. ### Claim 6 (depends on 4) The device according to claim 4, further comprising: a second memory portion; and a second switch, the second memory portion including a second magnetic portion including a third portion and a fourth portion, a second magnetic layer, and a second nonmagnetic layer provided between the fourth portion and the second magnetic layer, the second switch being provided in a second current path including the second memory portion and the first interconnection, the controller switching the first switch ON and switching the second switch OFF in the first write operation, the controller switching the first switch ON and switching the second switch OFF in the first shift operation. ### Claim 7 (depends on 6) The device according to claim 6, further comprising a third interconnection electrically connected to a second gate of the second switch. ### Claim 8 (depends on 6) The device according to claim 6, wherein the controller switches the first switch OFF and switches the second switch ON in a second write operation, and the controller switches the first switch OFF and switches the second switch ON in a second shift operation. ### Claim 9 (depends on 1) The device according to claim 1, wherein the first magnetic portion has a tubular configuration extending along a first direction, the first magnetic portion has a first surface on an outer side, and a position of the first surface in a second direction changes periodically along the first direction, the second direction crossing the first direction. ### Claim 10 (depends on 1) The device according to claim 1, wherein the first magnetic portion has a tubular configuration extending along a first direction, the first magnetic portion has a second surface on an inner side, and a position of the second surface in a second direction changes periodically along the first direction, the second direction crossing the first direction. ### Claim 11 (depends on 1) The device according to claim 1, wherein the first pulse is positive when writing first information in the first write operation, and in the first write operation, the first pulse is negative when writing second information different from the first information. ### Claim 12 (depends on 1) The device according to claim 1, wherein the second pulse is positive when shifting information in a first orientation in the first shift operation, and the second pulse is negative when shifting the information in a second orientation in the first shift operation, the second orientation being the reverse of the first orientation. ### Claim 13 (depends on 1) The device according to claim 1, wherein the first magnetic portion includes a domain wall, and a position of the domain wall is different before and after the applying of the second pulse. ### Claim 14 (depends on 1) The device according to claim 1, wherein in the first write operation, the controller applies a first prepulse between the first conductive portion and the first interconnection before the applying of the first pulse, the first prepulse having a first prepulse height and a first prepulse length, an absolute value of the first prepulse height is less than the absolute value of the first pulse height, the first prepulse length is longer than the first pulse length, and a polarity of the first prepulse is the reverse of a polarity of the first pulse. ### Claim 15 (depends on 14) The device according to claim 14, wherein the first prepulse length is not less than 0.2 times but less than 1 times the second pulse length. ### Claim 16 (depends on 14) The device according to claim 14, wherein the first prepulse length is 0.5 times the second pulse length or less. ### Claim 17 (depends on 1) The device according to claim 1, wherein the absolute value of the second pulse height is ½ of the absolute value of the first pulse height or less, and the second pulse length is 2 times the first pulse length or more.