# US 10,482,818 B2 · Pixel controlled via emission control signals during sub-periods and display device including the same > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,482,818 B2 - Document ID: US10482818B2 - Status: Granted - Kind: B2 - Application number: 15/882,734 - Filed: 2018-01-29 - Published: 2018-08-02 - Granted: 2019-11-19 - Earliest claimed: 2017-02-01 - Assignees: Samsung Display Co., Ltd. - Applicants: Samsung Display Co., Ltd. - Inventors: Tae Hoon Kwon; Ji Hyun Ka; Min Ku Lee; Seung Ji Cha; Hyun Uk Oh; Jin Tae Jeong - Web page: https://patentgrep.com/patent/US10482818B2 ## CPC - G09G 3/3233: with pixel circuitry controlling the current through the light-emitting element - G09G 3/2018: {by time modulation using two or more time intervals} - G09G 3/3266: Details of drivers for scan electrodes - G09G 3/3275: Details of drivers for data electrodes - G09G 2300/0426: Layout of electrodes and connections - G09G 2300/0819: used for counteracting undesired variations, e.g. feedback or autozeroing - G09G 2300/0842: forming a memory circuit, e.g. a dynamic memory with one capacitor - G09G 2300/0861: with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes - G09G 2310/0256: with the purpose of reversing the voltage across a light emitting or modulating element within a pixel - G09G 2310/0286: Details of a shift registers arranged for use in a driving circuit - G09G 2310/08: Details of timing specific for flat panels, other than clock recovery - G09G 2320/0238: Improving the black level - G09G 2320/0247: Flicker reduction other than flicker reduction circuits used for single beam cathode-ray tubes - G09G 2320/064: by time modulation of the brightness of the illumination source - G09G 2330/021: Power management, e.g. power saving - G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00) ## Abstract A display device includes pixels coupled to scan lines, emission control lines, and data lines, a scan driver configured to supply scan signals to the pixels through the scan lines, an emission driver configured to supply emission control signals to the pixels through the emission control lines, and a data driver configured to supply data signals to the pixels through the data lines, wherein the emission driver is configured to supply the emission control signals for each one of sub-periods in one frame period, and wherein a width of the emission control signals in any one sub-period from among the sub-periods is different from that of the emission control signals in another sub-period from among the sub-periods. ## Claims ### Claim 1 A display device comprising: pixels coupled to scan lines, emission control lines, and data lines; a scan driver configured to supply scan signals to the pixels through the scan lines; an emission driver configured to supply emission control signals to the pixels through the emission control lines; and a data driver configured to supply data signals to the pixels through the data lines, wherein the emission driver is configured to supply the emission control signals for each one of sub-periods in one frame period, wherein the one frame period comprises a first sub-period, a second sub-period, a third sub-period, and a fourth sub-period, which are sequentially ordered, wherein the scan driver is configured to supply the scan signals during the first sub-period and not during the second, third, and fourth sub-periods, and wherein the emission control signals in the third sub-period have a first width, and the emission control signals in the first, second, and fourth sub-periods have a second width that is less than the first width. ### Claim 2 (depends on 1) The display device of claim 1, wherein the emission driver is further configured to control a non-emission period of the pixels via the emission control signals. ### Claim 3 (depends on 1) The display device of claim 1, wherein a pixel coupled to an ith (i being a natural number) emission control line and an mth (m being a natural number) data line from among the pixels comprises: an organic light emitting diode; a first transistor configured to control an amount of driving current flowing from a first pixel power source to a second pixel power source via the organic light emitting diode, corresponding to a data signal of the data signals supplied to the mth data line; and an emission control transistor on a path of the driving current, the emission control transistor being configured to block the driving current, corresponding to an emission control signal of the emission control signals supplied from the ith emission control line. ### Claim 4 (depends on 3) The display device of claim 3, wherein the pixel coupled to the ith emission control line and the mth data line further comprises: a second transistor coupled between a first electrode of the first transistor and the mth data line; a third transistor coupled between a gate electrode of the first transistor and a second electrode of the first transistor; a fourth transistor coupled between the gate electrode of the first transistor and a third pixel power source; a fifth transistor coupled between the third pixel power source and an anode electrode of the organic light emitting diode; and a storage capacitor coupled between the first pixel power source and the gate electrode of the first transistor. ### Claim 5 (depends on 4) The display device of claim 4, wherein the emission control transistor comprises: a first emission control transistor coupled between the second electrode of the first transistor and the anode electrode of the organic light emitting diode, the first emission control transistor comprising a gate electrode coupled to the ith emission control line; and a second emission control transistor coupled between the first pixel power source and the first electrode of the first transistor, the second emission control transistor comprising a gate electrode coupled to the ith emission control line. ### Claim 6 A pixel comprising: an organic light emitting diode; a first transistor configured to control an amount of driving current flowing from a first pixel power source to a second pixel power source via the organic light emitting diode, corresponding to a data signal supplied to a data line; a second transistor coupled between a first electrode of the first transistor and the data line; and an emission control transistor on a path of the driving current, the emission control transistor being configured to block the driving current, corresponding to an emission control signal supplied to an emission control line, wherein the emission control transistor is turned off for each one of sub-periods in one frame period, wherein the one frame period comprises a first sub-period, a second sub-period, a third sub-period, and a fourth sub-period, which are sequentially ordered, wherein the second transistor is turned on in the first sub-period, and is not turned on in the second, third, and fourth sub-periods, and wherein an off period of the emission control transistor in the third sub-period is a first length of time, and the off period of the emission control transistor in the first, second, and fourth sub-periods is a second length of time that is less than the first length of time. ### Claim 7 (depends on 6) The pixel of claim 6, further comprising: a third transistor coupled between a gate electrode of the first transistor and a second electrode of the first transistor; a fourth transistor coupled between the gate electrode of the first transistor and a third pixel power source; a fifth transistor coupled between the third pixel power source and an anode electrode of the organic light emitting diode; and a storage capacitor coupled between the first pixel power source and the gate electrode of the first transistor. ### Claim 8 (depends on 7) The pixel of claim 7, wherein the emission control transistor comprises: a first emission control transistor coupled between the second electrode of the first transistor and the anode electrode of the organic light emitting diode, the first emission control transistor comprising a gate electrode coupled to the emission control line; and a second emission control transistor coupled between the first pixel power source and the first electrode of the first transistor, the second emission control transistor comprising a gate electrode coupled to the emission control line. ### Claim 9 A display device comprising: pixels coupled to scan lines, emission control lines, initialization lines, and data lines, each one of the pixels comprising an organic light emitting diode; a scan driver configured to supply scan signals to the pixels through the scan lines; an emission driver configured to supply emission control signals, for each one of sub-periods in one frame period, to the pixels through the emission control lines; an initialization driver configured to supply initialization signals to the pixels through the initialization lines; and a data driver configured to supply data signals to the pixels through the data lines, wherein the organic light emitting diode of each one of the pixels is initialized in each one of sub-periods in one frame period, wherein the one frame period comprises a first sub-period, a second sub-period, a third sub-period, and a fourth sub-period, which are sequentially ordered, wherein the scan driver is configured to supply the scan signals during the first sub-period and not during the second, third, and fourth sub-periods, and wherein the emission control signals in the third sub-period have a first width, and the emission control signals in the first, second, and fourth sub-periods have a second width that is less than the first width. ### Claim 10 (depends on 9) The display device of claim 9, wherein the initialization driver is configured to output the initialization signals during each one of the sub-periods, and wherein the emission driver is configured to output the emission control signals during each one of the sub-periods. ### Claim 11 (depends on 10) The display device of claim 10, wherein the initialization driver is configured to control initialization of the organic light emitting diodes via the initialization signals, and wherein the emission driver is configured to control a non-emission period of the pixels via the emission control signals. ### Claim 12 (depends on 9) The display device of claim 9, wherein a pixel coupled to an ith (i being a natural number) initialization line, an ith emission control line, and an mth (m being a natural number) data line from among the pixels comprises: a first transistor configured to control an amount of driving current flowing from a first pixel power source to a second pixel power source via the organic light emitting diode, corresponding to a data signal of the data signals supplied to the mth data line; an initialization transistor configured to supply an initialization voltage to an anode electrode of the organic light emitting diode, corresponding to an initialization signal supplied to the ith initialization line; and an emission control transistor on a path of the driving current, the emission control transistor being configured to block the driving current, corresponding to an emission control signal of the emission control signals supplied to the ith emission control line. ### Claim 13 (depends on 12) The display device of claim 12, wherein the pixel coupled to the ith initialization line, the ith emission control line, and the mth data line further comprises: a second transistor coupled between a first electrode of the first transistor and the mth data line; a third transistor coupled between a gate electrode of the first transistor and a second electrode of the first transistor; a fourth transistor coupled between the gate electrode of the first transistor and a third pixel power source; and a storage capacitor coupled between the first pixel power source and the gate electrode of the first transistor. ### Claim 14 (depends on 13) The display device of claim 13, wherein the emission control transistor comprises: a first emission control transistor coupled between the second electrode of the first transistor and the anode electrode of the organic light emitting diode, the first emission control transistor comprising a gate electrode coupled to the ith emission control line; and a second emission control transistor coupled between the first pixel power source and the first electrode of the first transistor, the second emission control transistor comprising a gate electrode coupled to the ith emission control line. ### Claim 15 A pixel comprising: an organic light emitting diode; a first transistor configured to control an amount of driving current flowing from a first pixel power source to a second pixel power source via the organic light emitting diode, corresponding to a data signal supplied to a data line; a second transistor coupled between a first electrode of the first transistor and the data line; an initialization transistor configured to supply an initialization voltage to an anode electrode of the organic light emitting diode, corresponding to an initialization signal supplied to an initialization line; and an emission control transistor located on a path of the driving current, the emission control transistor being configured to block the driving current, corresponding to an emission control signal supplied to an emission control line, wherein the initialization transistor supplies the initialization voltage to the anode electrode of the organic light emitting diode for each one of sub-periods in one frame period, wherein the one frame period comprises a first sub-period, a second sub-period, a third sub-period, and a fourth sub-period, which are sequentially ordered, wherein the second transistor is turned on in the first sub-period, and is not turned on in the second, third, and fourth sub-periods, and wherein an off period of the emission control transistor in the third sub-period is a first length of time, and the off period of the emission control transistor in the first, second, and fourth sub-periods is a second length of time less that is less than the first length of time. ### Claim 16 (depends on 15) The pixel of claim 15, wherein an on period of the initialization transistor overlaps with an off period of the emission control transistor during each one of the sub-periods. ### Claim 17 (depends on 15) The pixel of claim 15, further comprising: a third transistor coupled between a gate electrode of the first transistor and a second electrode of the first transistor; a fourth transistor coupled between the gate electrode of the first transistor and a third pixel power source; and a storage capacitor coupled between the first pixel power source and the gate electrode of the first transistor. ### Claim 18 (depends on 15) The pixel of claim 15, wherein the emission control transistor comprises: a first emission control transistor coupled between a second electrode of the first transistor and the anode electrode of the organic light emitting diode, the first emission control transistor comprising a gate electrode coupled to the emission control line; and a second emission control transistor coupled between the first pixel power source and the first electrode of the first transistor, the second emission control transistor comprising a gate electrode coupled to the emission control line.