# US 10,482,814 B2 · Display device and method for driving same

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- Number: US 10,482,814 B2
- Document ID: US10482814B2
- Status: Granted
- Kind: B2
- Application number: 15/504,987
- Filed: 2015-07-31
- Published: 2017-09-21
- Granted: 2019-11-19
- Earliest claimed: 2014-08-20
- Assignees: Joled Inc.
- Applicants: Joled Inc.
- Inventors: Kohei Ebisuno; Shinya Ono; Masafumi Matsui
- Web page: https://patentgrep.com/patent/US10482814B2

## CPC

- G09G 3/3233: with pixel circuitry controlling the current through the light-emitting element
- H10K 59/1213: {the pixel elements being TFTs}
- H10K 59/1216: {the pixel elements being capacitors}
- H10K 59/131: Interconnections, e.g. wiring lines or terminals
- G09G 2300/0842: forming a memory circuit, e.g. a dynamic memory with one capacitor
- G09G 2300/0866: by means of changes in the pixel supply voltage
- G09G 2310/0251: Precharge or discharge of pixel before applying new pixel voltage
- G09G 2310/0254: Control of polarity reversal in general, other than for liquid crystal displays
- G09G 2310/08: Details of timing specific for flat panels, other than clock recovery
- G09G 2320/0271: Adjustment of the gradation levels within the range of the gradation scale, e.g. by redistribution or clipping
- G09G 2320/043: Preventing or counteracting the effects of ageing
- G09G 2320/045: Compensation of drifts in the characteristics of light emitting or modulating elements
- G09G 2320/0626: for control of overall brightness
- G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00)
- H10K: ORGANIC ELECTRIC SOLID-STATE DEVICES

## Abstract

A method for driving a display device including a plurality of pixels arranged in rows and columns, each of the pixels including an organic EL device that emits light in accordance with supplied current, a driving transistor that supplies current to the organic EL device, and a storage capacitor connected between the gate of driving transistor and a source or drain thereof, includes causing the organic EL device to emit light by supplying current to the organic EL device; resetting charge of at least one of the storage capacitor and a parasitic capacitance of the organic EL device; and applying a reverse bias voltage between the gate and source of the driving transistor. The resetting is performed between the light emission and the reverse-bias application.

## Claims

### Claim 1

A method for driving a display device including a plurality of pixels arranged in rows and columns,
each of the plurality of pixels including:
a light emitting device that emits light in accordance with supplied current;
a driving transistor that supplies current to the light emitting device;
a single storage capacitor connected between a gate of the driving transistor and a source or drain of the driving transistor; and
a switching transistor connected between the gate of the driving transistor and a data line,
wherein a first electrode of the storage capacitor is connected only to the gate of the driving transistor and a source or drain of the switching transistor,
wherein a second electrode of the storage capacitor is connected only to an anode of the light emitting device and the source or drain of the driving transistor, and
wherein a node between the gate of the driving transistor and the source or drain of the switching transistor is connected only to the first electrode of the storage capacitor, the gate of the driving transistor and the source or drain of the switching transistor,
the method comprising:
causing the light emitting device to emit light by supplying current to the light emitting device during a light emission period;
resetting charge of at least one of the storage capacitor and a parasitic capacitance of the light emitting device during a reset period; and
applying a reverse bias voltage between the gate and source of the driving transistor during a reverse-bias application period,
wherein the resetting is performed between the light emission and the reverse-bias application, and
wherein a gate potential voltage during the reverse-bias application period is lower than a gate potential voltage during the light emission period.

### Claim 2 (depends on 1)

The method according to claim 1,
wherein the display device further includes:
a power line connected to the drain or source of the driving transistor of each of the plurality of pixels,
wherein the data line is provided for each of the columns of the plurality of pixels, and
wherein, in the resetting, the charge of at least one of the storage capacitor and the parasitic capacitance is discharged into the power line by bringing the switching transistor into conduction to supply a reset potential from the data line to the gate of the driving transistor and to bring the driving transistor into conduction.

### Claim 3 (depends on 2)

The method according to claim 2,
wherein the power line is selectively set to a first potential or a second potential lower than the first potential,
the data line is selectively set to one of a plurality of potentials including a signal potential corresponding to a pixel signal,
in the light emission, the current is supplied from the power line through the driving transistor to the light emitting device by setting the power line to the first potential,
in the resetting, the reset potential is supplied to the gate of the driving transistor by bringing the switching transistor into conduction while the power line is set to the second potential and the data line is set to the reset potential, and
in the reverse-bias application, the reverse bias voltage is applied by bringing the switching transistor into conduction to supply the reverse bias potential to the gate of the driving transistor, while the power line is set to the second potential and the data line is set to the reverse bias potential.

### Claim 4 (depends on 3)

The method according to claim 3,
wherein the reset potential is a predetermined potential independent of the signal potential.

### Claim 5 (depends on 4)

The method according to claim 4,
wherein the data line is sequentially set to the signal potential for each row of the plurality of pixels at an interval of one horizontal period, and
the one horizontal period includes:
a first period during which the data line is set to the signal potential;
a second period during which the data line is set to the reset potential; and
a third period during which the data line is set to the reverse bias potential.

### Claim 6 (depends on 5)

The method according to claim 5,
wherein the data line is driven at a frequency that is three times one horizontal frequency.

### Claim 7 (depends on 4)

The method according to claim 4,
wherein the data line is sequentially set to the signal potential for each row of the plurality of pixels at an interval of one horizontal period,
two continuous horizontal periods each include a first period during which the data line is set to the signal potential,
one of the two continuous horizontal periods further includes a second period during which the data line is set to the reset potential, and
the other of the two continuous horizontal periods further includes a third period during which the data line is set to the reverse bias potential.

### Claim 8 (depends on 7)

The method according to claim 7,
wherein the data line is driven at a frequency that is twice of one horizontal frequency.

### Claim 9 (depends on 8)

The method according to claim 8,
wherein the light emission, the resetting, and the reverse-bias application for a plurality of rows are performed simultaneously.

### Claim 10 (depends on 3)

The method according to claim 3,
wherein the reset potential is the signal potential for another row.

### Claim 11 (depends on 10)

The method according to claim 10,
wherein the power line is further selectively set to a third potential that is lower than the first potential and higher than the second potential,
the method further comprising:
in preparation for writing, setting the source and drain of the driving transistor to the third potential by first bringing the switching transistor into conduction, while the power line is set at the second potential and the data line is set at the signal potential for the other row, to supply the signal potential for the other row to the gate of the driving transistor and bring the driving transistor into conduction, and then setting the power line to the third potential while the driving transistor is conducting; and
writing a signal voltage to the storage capacitor by bringing the switching transistor into conduction while the power line is set to the third potential and the data line is set to the signal potential corresponding to the pixel.

### Claim 12 (depends on 1)

The method according to claim 1, further comprising
detecting a threshold voltage of the driving transistor after the reverse-bias application.

### Claim 13 (depends on 1)

The method according to claim 1,
wherein the reverse bias voltage is determined on the basis of a signal voltage supplied to a corresponding pixel.

### Claim 14 (depends on 1)

The method according to claim 1,
wherein a gate potential voltage during the reset period is higher than the gate potential voltage during the reverse-bias application period.

### Claim 15

A display device including a plurality of pixels arranged in rows and columns,
each of the plurality of pixels including:
a light emitting device that emits light in accordance with supplied current;
a driving transistor that supplies current to the light emitting device;
a single storage capacitor connected between a gate of the driving transistor and a source or drain of the driving transistor, and
a switching transistor connected between the gate of the driving transistor and a data line,
wherein a first electrode of the storage capacitor is connected only to the gate of the driving transistor and a source or drain of the switching transistor,
wherein a second electrode of the storage capacitor is connected only to an anode of the light emitting device and the source or drain of the driving transistor, and
wherein a node between the gate of the driving transistor and the source or drain of the switching transistor is connected only to the first electrode of the storage capacitor, the gate of the driving transistor and the source or drain of the switching transistor,
the display device comprising:
a controller that (i) causes the light emitting device to emit light by supplying current to the light emitting device during a light emission period, (ii) reset charge of at least one of the storage capacitor and a parasitic capacitance of the light emitting device during a reset period, and (iii) applies a reverse bias voltage between the gate and source of the driving transistor during a reverse-bias application period,
wherein the reset period is between the light emission period and the reverse-bias application period, and
wherein a gate potential voltage during the reverse-bias application period is lower than a gate potential voltage during the light emission period.

### Claim 16 (depends on 15)

The display device according to claim 15,
wherein a gate potential voltage during the reset period is higher than the gate potential voltage during the reverse-bias application period.
