# US 10,482,813 B2 · Power off method of display device, and display device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,482,813 B2 - Document ID: US10482813B2 - Status: Granted - Kind: B2 - Application number: 15/032,133 - Filed: 2014-07-23 - Published: 2016-10-20 - Granted: 2019-11-19 - Earliest claimed: 2013-10-30 - Assignees: Joled Inc. - Applicants: Joled Inc. - Inventors: Hitoshi Tsuge - Web page: https://patentgrep.com/patent/US10482813B2 ## CPC - G09G 3/3233: with pixel circuitry controlling the current through the light-emitting element - G09G 3/325: the data current flowing through the driving transistor during a setting phase, e.g. by using a switch for connecting the driving transistor to the data driver - G09G 3/3266: Details of drivers for scan electrodes - G09G 3/3283: in which the data driver supplies a variable data current for setting the current through, or the voltage across, the light-emitting elements - G09G 2300/0809: Several active elements per pixel in active matrix panels - G09G 2300/0819: used for counteracting undesired variations, e.g. feedback or autozeroing - G09G 2300/0842: forming a memory circuit, e.g. a dynamic memory with one capacitor - G09G 2300/0861: with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes - G09G 2310/0251: Precharge or discharge of pixel before applying new pixel voltage - G09G 2310/0278: Details of driving circuits arranged to drive both scan and data electrodes - G09G 2330/02: Details of power systems and of start or stop of display operation - G09G 2330/027: Arrangements or methods related to powering off a display - G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00) ## Abstract A power off method of a display device includes: detecting a power off operation on the display device; setting, when the power off operation is detected, a same potential in one electrode and an other electrode of a capacitance element in each of a plurality of pixel circuits; and stopping power supply to a display panel immediately after the same potential is set. ## Claims ### Claim 1 A power off method of a display device that includes a display panel having a plurality of pixel circuits arranged in a matrix, each of the plurality of pixel circuits including: a light emitting element that emits light according to an amount of current supplied; a drive transistor that supplies the current to the light emitting element; and a capacitance element that is connected to a gate of the drive transistor and holds a voltage representing luminance, the power off method of a display device comprising: detecting a power off operation on the display device; setting, when the power off operation is detected, a same potential in a first electrode and a second electrode of the capacitance element in each of the plurality of pixel circuits; and stopping power supply to the display panel after the same potential is set, wherein each of the plurality of pixel circuits further includes: a first switch transistor connected to the first electrode of the capacitance element; a first wire connected to the first electrode of the capacitance element via the first switch transistor; a second switch transistor connected to the second electrode of the capacitance element and not connected to the first electrode of the capacitance element, the second switch transistor being separate from the drive transistor; a second wire connected to the second electrode of the capacitance element via the second switch transistor; a third switch transistor connected to the first electrode of the capacitance element; and a node to which only the following four elements are connected: the first electrode of the capacitance element, a gate of the drive transistor, a drain/source of the first switch transistor, and a drain/source of the third switch transistor, and the setting comprises: turning off, when the power off operation is detected, the first switch transistor and the second switch transistor before 0V is supplied to the first and the second wires; supplying 0V to the first wire and the second wire; determining whether a wait time has elapsed, the wait time being a time period from a start of supplying 0V to the first wire and the second wire to when the potentials of the first wire and the second wire are determined to be at 0V, wherein after 0V is supplied to the first and second wires, the potentials of the first wire and the second wire are gradually changed to approach 0V during the wait time; and turning on the first switch transistor and the second switch transistor after the wait time is determined to be elapsed. ### Claim 2 (depends on 1) The power off method of a display device according to claim 1, wherein in the setting, a ground potential is set in the plurality of pixel circuits as the same potential. ### Claim 3 (depends on 1) The power off method of a display device according to claim 1, wherein in the setting, the same potential is set in the plurality of pixel circuits simultaneously. ### Claim 4 (depends on 1) The power off method of a display device according to claim 1, further comprising a second node to which only the following four elements are connected: the second electrode of the capacitance element, a drain/source of the drive transistor, a drain/source of the second switch transistor, and an anode of the light emitting element. ### Claim 5 A display device comprising: a display panel having a plurality of pixel circuits arranged in a matrix, each of the plurality of pixel circuits including: a light emitting element that emits light according to an amount of current supplied; a drive transistor that supplies the current to the light emitting element; and a capacitance element that is connected to a gate of the drive transistor and holds a voltage representing luminance; a controller configured to set, when a power off operation is detected, a same potential in a first electrode and a second electrode of the capacitance element in each of the plurality of pixel circuits; and a power source configured to stop power supply to the display panel after a specific process to set the same potential is completed, wherein each of the plurality of pixel circuits further includes: a first switch transistor connected to the first electrode of the capacitance element; a first wire connected to the first electrode of the capacitance element via the first switch transistor; a second switch transistor connected to the second electrode of the capacitance element and not connected to the first electrode of the capacitance element, the second switch transistor being separate from the drive transistor; a second wire connected to the second electrode of the capacitance element via the second switch transistor; a third switch transistor connected to the first electrode of the capacitance element; and a first node to which only the following four elements are connected: the first electrode of the capacitance element, a gate of the drive transistor, a drain/source of the first switch transistor, and a drain/source of the third switch transistor, and the controller sets the same potential in first electrode and the second electrode of the capacitance element, by turning off, when the power off operation is detected, the first switch transistor and the second switch transistor before 0V is supplied to the first and the second wires; supplying 0V to the first wire and the second wire; determining whether a wait time has elapsed, the wait time being a time period from a start of supplying 0V to the first wire and the second wire to when the potentials of the first wire and the second wire are determined to be at 0V, wherein after 0V is supplied to the first and second wires, the potentials of the first wire and the second wire are gradually changed to approach 0V during the wait time; and turning on the first switch transistor and the second switch transistor after the wait time is determined to be elapsed. ### Claim 6 (depends on 1) The power off method of a display device according to claim 1, wherein the second electrode of the capacitance element is connected to an anode of the light emitting element. ### Claim 7 (depends on 1) The power off method of a display device according to claim 1, wherein the second switch transistor is connected between an anode of the light emitting element and either source or drain of the drive transistor. ### Claim 8 (depends on 1) The power off method of a display device according to claim 1, wherein one of a source and a drain of the first switch transistor is connected to the first electrode of the capacitance element; an other one of the source and the drain of the first switch transistor is connected to the first wire; one of a source and a drain of the second switch transistor is connected to the second electrode of the capacitance element; and an other one of the source and the drain of the second switch transistor is connected to the second wire. ### Claim 9 (depends on 5) The display device according to claim 5, further comprising a second node to which only the following four elements are connected: the second electrode of the capacitance element, a drain/source of the drive transistor, a drain/source of the second switch transistor, and an anode of the light emitting element.