# US 10,482,052 B2 · Semiconductor device and memory system > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,482,052 B2 - Document ID: US10482052B2 - Status: Granted - Kind: B2 - Application number: 15/978,272 - Filed: 2018-05-14 - Published: 2018-09-13 - Granted: 2019-11-19 - Earliest claimed: 2009-12-09 - Assignees: Toshiba Memory Corporation - Applicants: Toshiba Memory Corporation - Inventors: Kunihiko Yamagishi; Toshitada Saito - Web page: https://patentgrep.com/patent/US10482052B2 ## CPC - G06F 13/4068: {Electrical coupling} - G06F 12/0246: {in block erasable memory, e.g. flash memory} - G06F 13/385: {for adaptation of a particular data processing system to different peripheral devices} - G06F 13/40: Bus structure {(for computer networks G06F15/163; for optical bus networks H04B10/25)} - G06F 13/4063: {Device-to-bus coupling} - G06F 13/42: Bus transfer protocol, e.g. handshake; Synchronisation - G06F 13/4282: {on a serial bus, e.g. I2C bus, SPI bus (on daisy chain buses G06F13/4247)} - H04L 25/03828: {Arrangements for spectral shaping; Arrangements for providing signals with specified spectral properties (partial response systems H04L25/497)} - G06F 2212/7201: Logical to physical mapping or translation of blocks or pages - G06F 2213/3804: Memory card connected to a computer port directly or by means of a reader/writer - G06F 2213/3854: Control is performed at the peripheral side - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) - H04L: TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION (arrangements common to telegraphic and telephonic communication H04M) ## Abstract A semiconductor device capable of communicating with a host apparatus includes a symbol generation unit, a coding unit, and a transmission unit. The symbol generation unit includes a random number generation circuit and generates a symbol according to a random number generated by the random number generation circuit. The coding unit performs 8b/10b coding for the symbol. The transmission unit transmits the symbol coded by the 8b/10b coding unit to the host apparatus. ## Claims ### Claim 1 A memory card communicating with a host apparatus, comprising: a card; a plurality of signal pins provided on the card and connectable to the host apparatus; a memory provided in the card and from and into which data can be read and written; and a memory controller circuit provided in the card and coupled to the memory and capable of being coupled to the host apparatus via ones of the plurality of pins, the memory controller circuit selecting one symbol from a pair of a first symbol and a second symbol, the symbols indicating an idle state, the first symbol having a plus running disparity and the second symbol having a minus running disparity, the one symbol selected by the memory controller circuit having a running disparity different from a running disparity of a symbol which is most recently selected, the memory controller circuit performing 8b/10b coding for the selected symbol and repeatedly transmitting the 8b/10b coded symbol to the host apparatus. ### Claim 2 (depends on 1) The card according to claim 1, wherein data to be transmitted from the card to the host apparatus is scrambled, and the scrambled data is transmitted to the host apparatus. ### Claim 3 (depends on 1) The card according to claim 1, wherein the memory controller circuit selects one of the first and second symbols according to a random number. ### Claim 4 (depends on 1) The card according to claim 1, wherein the memory controller circuit transmits, to the host apparatus, the coded symbol and coded scramble data as one symbol set. ### Claim 5 A memory card communicating with a host apparatus, comprising: a card; a plurality of signal pins provided on the card and connectable to the host apparatus; a memory provided in the card and from and into which data can be read and written; and a memory controller circuit provided in the card and coupled to the memory and capable of being coupled to the host apparatus via ones of the plurality of pins, the memory controller circuit selecting one symbol from a pair of a first symbol and a second symbol, the memory controller circuit performing 8b/10b coding for the selected symbol and a third symbol which indicates a delimiter, the memory controller circuit repeatedly transmitting a symbol set including the 8b/10b coded one of the first and second symbols and the 8b/10b coded third symbol to the host apparatus, the symbol set being used to set up synchronization with the host apparatus, the first symbol having a plus running disparity and the second symbol having a minus running disparity, the one symbol selected by the memory controller circuit having a running disparity different from a running disparity of a symbol which is most recently selected. ### Claim 6 (depends on 5) The card according to claim 5, wherein data to be transmitted from the card to the host apparatus is scrambled, and the scrambled data is transmitted to the host apparatus. ### Claim 7 (depends on 5) The card according to claim 5, wherein the memory controller circuit selects one of the first and second symbols according to a random number. ### Claim 8 (depends on 5) The card according to claim 5, wherein the memory controller circuit transmits, to the host apparatus, the coded symbol and coded scramble data as one symbol set. ### Claim 9 A memory card communicating with a host apparatus, comprising: a card; a plurality of signal pins provided on the card and connectable to the host apparatus; a memory provided in the card and from and into which data can be read and written; and a memory controller circuit provided in the card and coupled to the memory and capable of being coupled to the host apparatus via ones of the plurality of pins, the memory controller circuit selecting one symbol from a pair of a first symbol and a second symbol, the symbols indicating an idle state, one of the first and second symbols being a symbol in which a running disparity is ±0, the one symbol selected by the memory controller circuit having a running disparity different from a running disparity of a symbol which is most recently selected, the memory controller circuit performing 8b/10b coding for the selected symbol and repeatedly transmitting the 8b/10b coded symbol to the host apparatus. ### Claim 10 (depends on 9) The card according to claim 9, wherein data to be transmitted from the card to the host apparatus is scrambled, and the scrambled data is transmitted to the host apparatus. ### Claim 11 (depends on 9) The card according to claim 9, wherein the memory controller circuit selects one of the first and second symbols according to a random number. ### Claim 12 (depends on 9) The card according to claim 9, wherein the memory controller circuit transmits, to the host apparatus, the coded symbol and coded scramble data as one symbol set. ### Claim 13 A memory card communicating with a host apparatus, comprising: a card; a plurality of signal pins provided on the card and connectable to the host apparatus; a memory provided in the card and from and into which data can be read and written; and a memory controller circuit provided in the card and coupled to the memory and capable of being coupled to the host apparatus via ones of the plurality of pins, the memory controller circuit selecting one symbol from a pair of a first symbol and a second symbol, the memory controller circuit performing 8b/10b coding for the selected symbol and a third symbol which indicates a delimiter, the memory controller circuit repeatedly transmitting a symbol set including the 8b/10b coded one of the first and second symbols and the 8b/10b coded third symbol to the host apparatus, the symbol set being used to set up synchronization with the host apparatus, one of the first and second symbols being a symbol in which a running disparity is ±0, the one symbol selected by the memory controller circuit having a running disparity different from a running disparity of a symbol which is most recently selected. ### Claim 14 (depends on 13) The card according to claim 13, wherein data to be transmitted from the card to the host apparatus is scrambled, and the scrambled data is transmitted to the host apparatus. ### Claim 15 (depends on 13) The card according to claim 13, wherein the memory controller circuit selects one of the first and second symbols according to a random number. ### Claim 16 (depends on 13) The card according to claim 13, wherein the memory controller circuit transmits, to the host apparatus, the coded symbol and coded scramble data as one symbol set.