# US 10,482,037 B2 · System and method for deterring malicious network attacks

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- Number: US 10,482,037 B2
- Document ID: US10482037B2
- Status: Granted
- Kind: B2
- Application number: 16/204,623
- Filed: 2018-11-29
- Published: 2019-04-11
- Granted: 2019-11-19
- Earliest claimed: 2014-04-01
- Assignees: Georgetown University
- Applicants: Georgetown University
- Inventors: Thomas Clay Shields
- Web page: https://patentgrep.com/patent/US10482037B2

## CPC

- G06F 12/1408: {by using cryptography (for digital transmission H04L9/00)}
- G06F 12/1466: {Key-lock mechanism}
- G06F 21/50: Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems
- G06F 21/552: {involving long-term monitoring or reporting}
- H04L 9/0894: {Escrow, recovery or storing of secret information, e.g. secret key escrow or cryptographic key storage}
- H04L 9/14: using a plurality of keys or algorithms
- H04L 9/30: Public key, i.e. encryption algorithm being computationally infeasible to invert or user's encryption keys not requiring secrecy
- H04L 9/32: including means for verifying the identity or authority of a user of the system {or for message authentication, e.g. authorization, entity authentication, data integrity or data verification, non-repudiation, key authentication or verification of credentials}
- H04L 63/1408: {by monitoring network traffic (monitoring network traffic per se H04L43/00)}
- H04L 63/1441: {Countermeasures against malicious traffic (countermeasures against attacks on cryptographic mechanisms H04L9/002)}
- G06F 2212/1052: Security improvement
- G06F 2212/402: Encrypted data
- G06F 2221/034: Test or assess a computer or a system
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- H04L: TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION (arrangements common to telegraphic and telephonic communication H04M)

## Abstract

A system and method for deterring malicious network attacks. The system and method is configured to execute instructions on at least one of the processors to generate a plurality of random blocks of data; generate a first XOR result by using the XOR function with the plurality of random blocks of data as the XOR function inputs; generate a tail value by using the XOR function with the first XOR result and a random encryption key as the XOR function inputs; encrypt a designated file using the random encryption key; write the plurality of random blocks and tail value to at least one storage medium; and write the encrypted designated file to at least one storage medium.

## Claims

### Claim 1

A computer-readable storage medium, which is non-transitory, encoded with instructions that, when executed by one or more processors within a computer system, causes the computer system to:
execute instructions on at least one of the processors to generate a plurality of random blocks of data;
generate a first result by using the plurality of random blocks of data as inputs to a logic gate function;
generate a second result by using a data file as a first input to the logic gate function and the first result as a second input to the logic gate function; and
combine the plurality of random blocks together with the second result to form an expanded file that is larger than the data file.

### Claim 2 (depends on 1)

The computer-readable storage medium of claim 1, further comprising instructions that cause the computer system at least to:
recover the data file by using the logic gate function with blocks of the expanded file as inputs to the logic gate function.

### Claim 3 (depends on 1)

The computer-readable storage medium of claim 1, wherein the data file is a random encryption key.

### Claim 4 (depends on 3)

The computer-readable storage medium of claim 3, wherein the data file is a first data file and further including using the random encryption key with a second data file to generate an encrypted data file.

### Claim 5 (depends on 4)

The computer-readable storage medium of claim 4, further comprising instructions that cause the computer system at least to:
recover the random encryption key from the second result using the logic function; and
unencrypt the second data file using the random encryption key to recover the second data file.

### Claim 6 (depends on 1)

The computer-readable storage medium of claim 1, wherein the logic gate function includes a plurality of logic gates forming an XOR function.

### Claim 7 (depends on 1)

The computer-readable storage medium of claim 1, wherein the logic gate function is formed by a plurality of logic gates.

### Claim 8

A method of expanding a file, comprising:
generating a plurality of random blocks of data;
generating a first result by using a logic gate function with the plurality of random blocks of data as inputs to the logic gate function;
generating a second result by using a random encryption key and the first result as inputs to the logic gate function;
generating an expanded file by combining the plurality of random blocks of data with a block including the second result;
generating an encrypted data file using the random encryption key on a data file; and
storing at least the expanded file to a storage medium.

### Claim 9 (depends on 8)

The method of claim 8, further including storing the encrypted data file to the storage medium.

### Claim 10 (depends on 8)

The method of claim 8, further including generating a third result by using the logic gate function with inputs comprising the expanded file including the plurality of random blocks of data and the block including the second result so as to recover the random encryption key from the expanded file.

### Claim 11 (depends on 10)

The method of claim 10, further including decrypting the encrypted data file using the recovered random encryption key.

### Claim 12 (depends on 8)

The method of claim 8, wherein the logic gate function includes one or more logic gates forming an XOR function.

### Claim 13 (depends on 8)

The method of claim 8, wherein the logic gate function comprises multiple logic gates.
